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MC14018B_05 PDF预览

MC14018B_05

更新时间: 2024-11-16 04:59:35
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安森美 - ONSEMI 计数器
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8页 94K
描述
Presettable Divide−By−N Counter

MC14018B_05 数据手册

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MC14018B  
Presettable Divide−By−N  
Counter  
The MC14018B contains five Johnson counter stages which are  
asynchronously presettable and resettable. The counters are  
synchronous, and increment on the positive going edge of the clock.  
Presetting is accomplished by a logic 1 on the preset enable input.  
Data on the Jam inputs will then be transferred to their respective Q  
outputs (inverted). A logic 1 on the reset input will cause all Q outputs  
to go to a logic 1 state.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Division by any number from 2 to 10 can be accomplished by  
connecting appropriate Q outputs to the data input, as shown in the  
Function Selection table. Anti−lock gating is included in the  
MC14018B to assure proper counting sequence.  
16  
1
PDIP−16  
P SUFFIX  
CASE 648  
MC14018BCP  
AWLYYWWG  
Features  
Fully Static Operation  
16  
Schmitt Trigger on Clock Input  
SOIC−16  
D SUFFIX  
CASE 751B  
14018BG  
AWLYWW  
Capable of Driving Two Low−Power TTL Loads or One Low−Power  
Schottky TTL Load Over the Rated Temperature Range  
Pin−for−Pin Replacement for CD4018B  
1
Pb−Free Packages are Available*  
A
= Assembly Location  
= Wafer Lot  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
WL, L  
YY, Y  
= Year  
Symbol  
Parameter  
Value  
0.5 to +18.0  
Unit  
V
WW, W = Work Week  
V
DC Supply Voltage Range  
DD  
G
= Pb−Free Indicator  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
I , I  
Input or Output Current  
(DC or Transient) per Pin  
10  
mA  
in out  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
P
Power Dissipation, per Package  
(Note 1)  
500  
mW  
D
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
T
Lead Temperature  
(8−Second Soldering)  
L
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
1. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
DD  
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
August, 2005 − Rev. 6  
MC14018B/D  
 

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