MC14018BCPD

更新时间： 2024-11-16 13:01:39

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		计数器
页数	文件大小	规格书
6页	215K
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MC14018BCPD 数据手册

SEMICONDUCTOR TECHNICAL DATA

L SUFFIX

CERAMIC

CASE 620

The MC14018B contains five Johnson counter stages which are

asynchronously presettable and resettable. The counters are synchronous,

and increment on the positive going edge of the clock.

P SUFFIX

PLASTIC

CASE 648

Presetting is accomplished by a logic 1 on the preset enable input. Data on

the Jam inputs will then be transferred to their respective Q outputs

(inverted). A logic 1 on the reset input will cause all Q outputs to go to a logic

1 state.

Division by any number from 2 to 10 can be accomplished by connecting

appropriate Q outputs to the data input, as shown in the Function Selection

table. Anti–lock gating is included in the MC14018B to assure proper

counting sequence.

D SUFFIX

SOIC

CASE 751B

•

Fully Static Operation

Schmitt Trigger on Clock Input

Capable of Driving Two Low–power TTL Loads or One Low–power

Schottky TTL Load Over the Rated Temperature Range

Pin–for–Pin Replacement for CD4018B

ORDERING INFORMATION

MC14XXXBCP

MC14XXXBCL

MC14XXXBD

Plastic

Ceramic

SOIC

•

= – 55° to 125°C for all packages.

MAXIMUM RATINGS* (Voltages Referenced to V

)

Symbol

Parameter

DC Supply Voltage

Value

Unit

FUNCTIONAL TRUTH TABLE

– 0.5 to + 18.0

Preset

Jam

V , V

in out

Input or Output Voltage (DC or Transient)

– 0.5 to V

+ 0.5

Clock Reset Enable Input

l , l

Input or Output Current (DC or Transient),

per Pin

± 10

in out

D *

Power Dissipation, per Package†

Storage Temperature

500

stg

– 65 to + 150

260

* D is the Data input for that stage. Stage 1

has Data brought out to Pin 1.

Lead Temperature (8–Second Soldering)

* Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C

Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C

PIN ASSIGNMENT

JAM 1

This device contains protection circuitry to guard against damage

due to high static voltages or electric fields. However, precautions must

be taken to avoid applications of any voltage higher than maximum rated

JAM 2

voltages to this high-impedance circuit. For proper operation, V and

out

should be constrained to the range V

≤ (V or V ) ≤ V

in out DD

JAM 5

Unused inputs must always be tied to an appropriate logic voltage

level (e.g., either V or V ). Unused outputs must be left open.

SS DD

JAM 3

JAM 4

REV 3

1/94

Motorola, Inc. 1995

MOTOROLA CMOS LOGIC DATA

MC14018B

12 3 4 5 6

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与MC14018BCPD相关器件

型号	品牌	获取价格	描述	数据表
MC14018BCPDS	MOTOROLA	获取价格	4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 5-BIT UP RING COUNTER, PDIP16, 648-06
MC14018BCPG	ONSEMI	获取价格	Presettable Divide−By−N Counter
MC14018BCPS	MOTOROLA	获取价格	Decade Counter, Synchronous, Up Direction, CMOS, PDIP16,
MC14018BD	ONSEMI	获取价格	Presettable Divdie-By-N Counter
MC14018BD	ROCHESTER	获取价格	4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 5-BIT UP RING COUNTER, PDSO16, PLASTI
MC14018BD	MOTOROLA	获取价格	Presettable Divide-By-N Counter
MC14018BDEBS	MOTOROLA	获取价格	IC,COUNTER,UP,DECADE,CMOS,DIP,16PIN,CERAMIC
MC14018BDG	ONSEMI	获取价格	Presettable Divide−By−N Counter
MC14018BDR2	ONSEMI	获取价格	Presettable Divdie-By-N Counter
MC14018BDR2G	ONSEMI	获取价格	Presettable Divide−By−N Counter

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