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MC14020B_05

更新时间： 2024-09-15 04:59:35
品牌 Logo 应用领域
安森美 - ONSEMI 计数器
页数 文件大小 规格书
8页 114K
描述
14−Bit Binary Counter

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MC14020B_05 数据手册

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MC14020B  
14−Bit Binary Counter  
The MC14020B 14−stage binary counter is constructed with MOS  
P−Channel and N−Channel enhancement mode devices in a single  
monolithic structure. This part is designed with an input wave shaping  
circuit and 14 stages of ripple−carry binary counter. The device  
advances the count on the negative−going edge of the clock pulse.  
Applications include time delay circuits, counter controls, and  
frequency−dividing circuits.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
16  
1
• Fully Static Operation  
• Diode Protection on All Inputs  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
PDIP−16  
P SUFFIX  
CASE 648  
MC14020BCP  
AWLYYWW  
• Capable of Driving Two Low−power TTL Loads or One Low−power  
Schottky TTL Load Over the Rated Temperature Range  
• Buffered Outputs Available from stages 1 and 4 thru 14  
• Common Reset Line  
16  
SOIC−16  
D SUFFIX  
CASE 751B  
14020B  
AWLYWW  
• Pin−for−Pin Replacement for CD4020B  
• Pb−Free Packages are Available*  
1
16  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
14  
020B  
ALYW  
TSSOP−16  
DT SUFFIX  
CASE 948F  
Symbol  
Parameter  
Value  
−0.5 to +18.0  
Unit  
V
V
DC Supply Voltage Range  
DD  
1
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
−0.5 to V + 0.5  
V
DD  
16  
1
I , I  
Input or Output Current  
(DC or Transient) per Pin  
10  
mA  
in out  
SOEIAJ−16  
F SUFFIX  
CASE 966  
MC14020B  
ALYW  
P
Power Dissipation, per Package  
(Note 1)  
500  
mW  
D
T
A
Ambient Temperature Range  
Storage Temperature Range  
−55 to +125  
−65 to +150  
260  
°C  
°C  
°C  
T
stg  
T
Lead Temperature  
(8−Second Soldering)  
L
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
WW, W = Work Week  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
1. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
DD  
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
August, 2005 − Rev. 6  
MC14020B/D  
 
12345678

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