The MC14018B contains five Johnson counter stages which are
asynchronously presettable and resettable. The counters are
synchronous, and increment on the positive going edge of the clock.
Presetting is accomplished by a logic 1 on the preset enable input.
Data on the Jam inputs will then be transferred to their respective Q
outputs (inverted). A logic 1 on the reset input will cause all Q outputs
to go to a logic 1 state.
http://onsemi.com
MARKING
DIAGRAMS
Division by any number from 2 to 10 can be accomplished by
connecting appropriate Q outputs to the data input, as shown in the
Function Selection table. Anti–lock gating is included in the
MC14018B to assure proper counting sequence.
16
PDIP–16
P SUFFIX
CASE 648
MC14018BCP
AWLYYWW
1
• Fully Static Operation
• Schmitt Trigger on Clock Input
16
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
• Pin–for–Pin Replacement for CD4018B
SOIC–16
D SUFFIX
CASE 751B
14018B
AWLYWW
1
16
SOEIAJ–16
F SUFFIX
CASE 966
MAXIMUM RATINGS (Voltages Referenced to V ) (Note NO TAG)
SS
MC14018B
AWLYWW
Symbol
Parameter
Value
Unit
V
V
DD
DC Supply Voltage Range
–0.5 to +18.0
1
V , V
Input or Output Voltage Range
(DC or Transient)
–0.5 to V + 0.5
V
in out
DD
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
I , I
in out
Input or Output Current
(DC or Transient) per Pin
±10
mA
P
D
Power Dissipation,
500
mW
per Package (Note NO TAG)
ORDERING INFORMATION
T
Ambient Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
260
°C
°C
°C
A
Device
Package
PDIP–16
SOIC–16
Shipping
T
stg
T
Lead Temperature
(8–Second Soldering)
L
MC14018BCP
MC14018BD
2000/Box
48/Rail
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
MC14018BDR2
SOIC–16 2500/Tape & Reel
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
MC14018BF
SOEIAJ–16
SOEIAJ–16
See Note 1.
See Note 1.
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
MC14018BFEL
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
high–impedancecircuit. For proper operation, V and V should be constrained
in
out
to the range V
(V or V
)
V
DD
.
SS
in
out
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ). Unused outputs must be left open.
SS
DD
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 3
MC14018B/D