MC10H646FNR2

更新时间： 2024-11-23 04:59:39

品牌	Logo	应用领域
安森美 - ONSEMI		逻辑集成电路驱动时钟
页数	文件大小	规格书
8页	129K
描述
PECL/TTL−TTL 1:8 Clock Distribution Chip

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技术参数
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MC10H646FNR2 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QLCC	包装说明：	PLASTIC, LCC-28
针数：	28	Reach Compliance Code：	not_compliant
HTS代码：	8542.39.00.01	风险等级：	7.74
系列：	10H	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-PQCC-J28	JESD-609代码：	e0
长度：	11.505 mm	逻辑集成电路类型：	LOW SKEW CLOCK DRIVER
最大I（ol）：	0.024 A	湿度敏感等级：	1
功能数量：	1	反相输出次数：
端子数量：	28	实输出次数：	8
最高工作温度：	85 °C	最低工作温度：
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装等效代码：	LDCC28,.5SQ
封装形状：	SQUARE	封装形式：	CHIP CARRIER
峰值回流温度（摄氏度）：	240	电源：	5 V
Prop。Delay @ Nom-Sup：	7 ns	传播延迟（tpd）：	6.4 ns
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.5 ns
座面最大高度：	4.57 mm	子类别：	Clock Drivers
最大供电电压 (Vsup)：	5.25 V	最小供电电压 (Vsup)：	4.75 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	ECL	温度等级：	OTHER
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	11.505 mm

MC10H646FNR2 数据手册

MC10H646, MC100H646

PECL/TTL−TTL 1:8 Clock

Distribution Chip

Description

The MC10H/100H646 is a single supply, low skew translating 1:8

clock driver. Devices in the ON Semiconductor H646 translator series

utilize the 28−lead PLCC for optimal power pinning, signal flow

through and electrical performance. The single supply H646 is similar

to the H643, which is a dual supply 1:8 version of the same function.

The H646 was designed specifically to drive series terminated

transmission lines. Special techniques were used to match the HIGH

and LOW output impedances to about 7.0 W. This simplifies the

choice of the termination resistor for series terminated applications. To

match the HIGH and LOW output impedances, it was necessary to

http://onsemi.com

PLCC−28

FN SUFFIX

CASE 776

remove the standard I limiting resistor. As a result, the user should

take care in preventing an output short to ground as the part will be

permanently damaged.

The H646 device meets all of the requirements for driving the

60 MHz and 66 MHz Intel Pentium® Microprocessor. The device has

no PLL components, which greatly simplifies its implementation into

a digital design. The eight copies of the clock allows for

point−to−point clock distribution to simplify board layout and

optimize signal integrity.

MARKING DIAGRAM*

MCxxxH646G

AWLYYWW

The H646 provides differential PECL inputs for picking up LOW

skew PECL clocks from the backplane and distributing it to TTL loads

on a daughter board. When used in conjunction with the

MC10/100E111, very low skew, very wide clock trees can be

designed. In addition, a TTL level clock input is provided for

flexibility. Note that only one of the inputs can be used on a single

chip. For correct operation, the unused input pins should be left open.

The Output Enable pin forces the outputs into a high impedance

state when a logic 0 is applied.

xxx

= 10 or 100

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

The output buffers of the H646 can drive two series terminated,

50 W transmission lines each. This capability allows the H646 to drive

up to 16 different point−to−point clock loads. Refer to the

Applications section for a more detailed discussion in this area.

The 10H version is compatible with MECL™ 10H ECL logic levels.

The 100H version is compatible with 100K levels.

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Features

• PECL/TTL−TTL Version of Popular ECLinPS™ E111

• Low Skew

• Single Supply

• Extra TTL and ECL Power/Ground Pins

• Guaranteed Skew Spec

• Tri−State Enable

• Differential Internal Design

• Matched High and Low Output Impedance

• Meets Specifications Required to Drive

Intel® Pentium® Microprocessors

• Pb−Free Packages are Available*

• V Output

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

November, 2006 − Rev. 5

MC10H646/D

12 3 4 5 6 7 8

中文翻译

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MC10H646FNR2 替代型号

型号	品牌	替代类型	描述	数据表
MC10H646FNR2G	ONSEMI	完全替代	PECL/TTL−TTL 1:8 Clock Distribution Chip

与MC10H646FNR2相关器件

型号	品牌	获取价格	描述	数据表
MC10H646FNR2G	ONSEMI	获取价格	PECL/TTL−TTL 1:8 Clock Distribution Chip
MC10H660FN	MOTOROLA	获取价格	4-Bit ECL/TTL Load Reducing DRAM Driver
MC10H660FNR2	MOTOROLA	获取价格	ECL to TTL Translator, 1 Func, True Output, BIPolar, PQCC28, PLASTIC, LCC-28
MC10H680	ONSEMI	获取价格	4-Bit Differential ECL Bus/TTL Bus Transceciver
MC10H680_06	ONSEMI	获取价格	4−Bit Differential ECL Bus to TTL Bus Transceiver
MC10H680FN	MOTOROLA	获取价格	4-Bit Differential ECL Bus/TTL Bus Transceiver
MC10H680FN	ONSEMI	获取价格	4−Bit Differential ECL Bus to TTL Bus Transceiver
MC10H680FN	ROCHESTER	获取价格	QUAD TTL TO ECL TRANSCEIVER, COMPLEMENTARY OUTPUT, PQCC28, PLASTIC, LCC-28
MC10H680FNG	ONSEMI	获取价格	4−Bit Differential ECL Bus to TTL Bus Transceiver
MC10H680FNG	ROCHESTER	获取价格	QUAD TTL TO ECL TRANSCEIVER, COMPLEMENTARY OUTPUT, PQCC28, PLASTIC, LCC-28

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