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MC10H645 PDF预览

MC10H645

更新时间: 2024-11-18 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 时钟驱动器
页数 文件大小 规格书
5页 109K
描述
1:9 TTL CLOCK DRIVER

MC10H645 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10H645 is a single supply, low skew, TTL I/O 1:9 Clock Driver.  
Devices in the Motorola H600 clock driver family utiize the 28–lead PLCC  
for optimal power and signal pin placement.  
The device features a 24mA TTL ouput stage with AC performance  
specified into a 50pF load capacitance. A 2:1 input mux is provided on  
chip to allow for distributing both system and diagnostic clock signals or  
designing clock redundancy into a system. With the SEL input held LOW  
the DO input will be selected, while the D1 input is selected when the SEL  
input is forced HIGH.  
1:9 TTL  
CLOCK DRIVER  
Low Skew Typically 0.65ns Within Device  
Guaranteed Skew Spec 1.25ns Part–to–Part  
Input Clock Muxing  
Differential ECL Internal Design  
Single Supply  
Extra TTL and ECL Power/Ground Pins  
FN SUFFIX  
PLASTIC PACKAGE  
CASE 776–02  
PIN NAMES  
PIN  
FUNCTION  
TTL Ground (0V)  
TTL V (+5.0V)  
GT  
VT  
VE  
CC  
ECL V  
(+5.0V)  
CC  
GE  
Dn  
Q0 – Q8  
SEL  
ECL Ground (0V)  
TTL Signal Input  
TTL Signal Outputs  
TTL Mux Select  
LOGIC DIAGRAM  
Pinout: 28–Lead PLCC (Top View)  
TTL Outputs  
GT Q6 VT Q7  
VT Q8 GT  
21 20 19  
Q0  
Q1  
Q2  
TTL  
25  
24  
23  
22  
Inputs  
MUX  
GT 26  
Q5 27  
VT 28  
18  
17  
16  
15  
14  
13  
12  
NC  
D0  
D0  
D0  
D1  
D0  
Q
D1  
Q
D1  
D1  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
Q4  
VT  
Q3  
GT  
VE  
SEL  
GE  
NC  
1
S
S
2
3
4
SEL  
5
6
7
8
9
10  
11  
GT  
Q2 VT Q1  
VT Q0 GT  
9/96  
Motorola, Inc. 1996  
REV 4  

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