MC10E211FNG

更新时间： 2024-01-23 07:08:54

品牌	Logo	应用领域
安森美 - ONSEMI		时钟驱动器逻辑集成电路
页数	文件大小	规格书
11页	151K
描述
5V ECL 1:6 Differential Clock Distribution Chip

阅读下载

中文翻译

获取价格

技术参数
数据手册
替代型号

如果您发现信息不准确，欢迎纠错

MC10E211FNG 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QLCC
包装说明：	QCCJ, LDCC28,.5SQ	针数：	28
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.41	其他特性：	NECL MODE: VCC = 0 WITH VEE = -4.2V TO -5.7V
系列：	10E	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-PQCC-J28	JESD-609代码：	e3
长度：	11.505 mm	逻辑集成电路类型：	LOW SKEW CLOCK DRIVER
湿度敏感等级：	3	功能数量：	1
反相输出次数：		端子数量：	28
实输出次数：	6	最高工作温度：	85 °C
最低工作温度：		输出特性：	OPEN-EMITTER
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCJ
封装等效代码：	LDCC28,.5SQ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	峰值回流温度（摄氏度）：	260
电源：	-5.2 V	Prop。Delay @ Nom-Sup：	1.2 ns
传播延迟（tpd）：	1.125 ns	认证状态：	Not Qualified
Same Edge Skew-Max（tskwd）：	0.075 ns	座面最大高度：	4.57 mm
子类别：	Clock Drivers	最大供电电压 (Vsup)：	5.7 V
最小供电电压 (Vsup)：	4.2 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	ECL
温度等级：	OTHER	端子面层：	Tin (Sn)
端子形式：	J BEND	端子节距：	1.27 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	40
宽度：	11.505 mm	Base Number Matches：	1

MC10E211FNG 数据手册

MC10E211, MC100E211

5VꢀECL 1:6 Differential

Clock Distribution Chip

Description

The MC10E/100E211 is a low skew 1:6 fanout device designed

explicitly for low skew clock distribution applications.

http://onsemi.com

The E211 features a multiplexed clock input to allow for the

distribution of a lower speed scan or test clock along with the high

speed system clock. When LOW (or left open in which case it will be

pulled LOW by the input pulldown resistor) the SEL pin will select the

differential clock input.

PLCC−28

FN SUFFIX

CASE 776

Both a common enable and individual output enables are provided.

When asserted the positive output will go LOW on the next negative

transition of the CLK (or SCLK) input. The enabling function is

synchronous so that the outputs will only be enabled/disabled when

the outputs are already in the LOW state. In this way the problem of

runt pulse generation during the disable operation is avoided. Note that

the internal flip flop is clocked on the falling edge of the input clock

edge, therefore all associated specifications are referenced to the

negative edge of the CLK input.

MARKING DIAGRAM*

MCxxxE211FNG

AWLYYWW

The output transitions of the E211 are faster than the standard

ECLinPS edge rates. This feature provides a means of distributing

higher frequency signals than capable with the E111 device. Because

of these edge rates and the tight skew limits guaranteed in the

specification, there are certain termination guidelines which must be

followed. For more details on the recommended termination schemes

please refer to the applications information section of this data sheet.

xxx

= 10 or 100

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

The V pin, an internally generated voltage supply, is available to

this device only. For single−ended input conditions, the unused

*For additional marking information, refer to

Application Note AND8002/D.

differential input is connected to V as a switching reference voltage.

may also rebias AC coupled inputs. When used, decouple V

and V via a 0.01 mF capacitor and limit current sourcing or sinking

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 9 of this data sheet.

to 0.5 mA. When not used, V should be left open.

The 100 Series contains temperature compensation.

Features

• Guaranteed Low Skew Specification

• Synchronous Enabling/Disabling

• Multiplexed Clock Inputs

• ESD Protection: Human Body Model; > 2 kV,

Machine Model; > 100 V

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC

Latchup Test

• Moisture Sensitivity Level: Pb = 1; Pb−Free = 3

For Additional Information, see Application Note

AND8003/D

• Flammability Rating: UL 94 V−0 @ 0.125 in,

Oxygen Index: 28 to 34

• V Output for Single−Ended Use

• Common and Individual Enable/Disable Control

• High Bandwidth Output Transistors

• PECL Mode Operating Range: V = 4.2 V to 5.7 V

with V = 0 V

• NECL Mode Operating Range: V = 0 V with V

• Transistor Count = 457 devices

• Pb−Free Packages are Available*

−4.2 V to −5.7 V

• Internal Input 75 kW Pulldown Resistors

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

November, 2006 − Rev. 12

MC10E211/D

12 3 4 5 6 7...11

中文翻译

下载PDF

MC10E211FNG 替代型号

型号	品牌	替代类型	描述	数据表
MC10E211FNR2G	ONSEMI	完全替代	5V ECL 1:6 Differential Clock Distribution Chip
MC10E211FNR2	ONSEMI	完全替代	5V ECL 1:6 Differential Clock Distribution Chip
MC10E211FN	ONSEMI	完全替代	5V ECL 1:6 Differential Clock Distribution Chip

与MC10E211FNG相关器件

型号	品牌	获取价格	描述	数据表
MC10E211FNR2	ONSEMI	获取价格	5V ECL 1:6 Differential Clock Distribution Chip
MC10E211FNR2G	ONSEMI	获取价格	5V ECL 1:6 Differential Clock Distribution Chip
MC10E212	ONSEMI	获取价格	3-BIT SCANNABLE REGISTERED ADDRESS DRIVER
MC10E212_06	ONSEMI	获取价格	5V ECL 3-Bit Scannable Registered Address Driver
MC10E212FN	ONSEMI	获取价格	5V ECL 3-Bit Scannable Registered Address Driver
MC10E212FN	MOTOROLA	获取价格	3-BIT SCANNABLE REGISTERED ADDRESS DRIVER
MC10E212FNR2	ONSEMI	获取价格	5V ECL 3-Bit Scannable Registered Address Driver
MC10E221FN	ONSEMI	获取价格	10E SERIES, LOW SKEW CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28, PLASTIC
MC10E221FNR2	ONSEMI	获取价格	10E SERIES, LOW SKEW CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28, PLASTIC
MC10E241	ONSEMI	获取价格	8-BIT SCANNABLE REGISTER

与MC10E211FNG相关文章

SL74HC10N：高性能三输入与非门解析
2024-09-03

43
AIC1781A 电池充电控制器深度解析
2024-09-03

31
Pickering新高压舌簧继电器亮相汽车测试博览会
2024-08-26

68
采用MCU+MPU双处理器架构实现的创新应用设计探索
2024-08-23

75

产品中心

服务支持

精选活动

关于我们

帮助中心

MC10E211FNG

MC10E211FNG 技术参数

MC10E211FNG 数据手册

MC10E211FNG 替代型号

与MC10E211FNG相关器件

与MC10E211FNG相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MC10E211FNG

MC10E211FNG 技术参数

MC10E211FNG 数据手册

MC10E211FNG 替代型号

与MC10E211FNG相关器件

与MC10E211FNG相关文章

您还可以找

您在本页遇到什么问题？