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MC10136FNR2 PDF预览

MC10136FNR2

更新时间: 2024-11-04 14:53:11
品牌 Logo 应用领域
安森美 - ONSEMI 逻辑集成电路触发器
页数 文件大小 规格书
8页 150K
描述
10K SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PQCC20, PLASTIC, LCC-20

MC10136FNR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:PLASTIC, LCC-20
针数:20Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.5
计数方向:BIDIRECTIONAL系列:10K
JESD-30 代码:S-PQCC-J20JESD-609代码:e0
长度:8.965 mm负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:125000000 Hz
工作模式:SYNCHRONOUS湿度敏感等级:1
位数:4功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-30 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC20,.4SQ
封装形状:SQUARE封装形式:CHIP CARRIER
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:-5.2 V最大电源电流(ICC):138 mA
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:4.57 mm子类别:Counters
表面贴装:YES技术:ECL
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:8.965 mm
最小 fmax:125 MHzBase Number Matches:1

MC10136FNR2 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10136 is a high speed synchronous counter that can count up, count  
down, preset, or stop count at frequencies exceeding 100 MHz. The flexibility of  
this device allows the designer to use one basic counter for most applications,  
and the synchronous count feature makes the MC10136 suitable for either  
computers or instrumentation.  
Three control lines (S1, S2, and Carry In) determine the operation mode of  
the counter. Lines S1 and S2 determine one of four operations; preset  
(program), increment (count up), decrement (count down), or hold (stop count).  
Note that in the preset mode a clock pulse is necessary to load the counter, and  
the information present on the data inputs (D0, D1, D2, and D3) will be entered  
into the counter. Carry Out goes low on the terminal count, or when the counter  
is being preset.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
FN SUFFIX  
PLCC  
CASE 775–02  
This device is not designed for use with gated clocks. Control is via S1 and  
S2.  
DIP  
PIN ASSIGNMENT  
P
= 625 mW typ/pkg (No Load)  
= 150 MHz typ  
= 3.3 ns typ (C-Q)  
D
f
count  
V
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
t
pd  
7.0 ns typ (C-C  
)
out  
Q2  
Q1  
5.0 ns typ (C -C  
)
in out  
Q0  
Q3  
C
CLOCK  
D0  
out  
D3  
D2  
S2  
D1  
C
in  
V
S1  
EE  
FUNCTION TABLE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
C
S1 S2  
Operating Mode  
Preset (Program)  
Increment (Count Up)  
Hold Count  
in  
X
L
L
L
H
H
L
L
H
L
L
H
H
H
Decrement (Count Down)  
Hold Count  
H
X
L
H
Hold (Stop Count)  
3/93  
Motorola, Inc. 1996  
REV 5  

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