MC100ES6254FAR2

更新时间： 2024-12-01 05:10:27

品牌	Logo	应用领域
艾迪悌 - IDT		时钟驱动器逻辑集成电路
页数	文件大小	规格书
9页	537K
描述
2.5/3.3V DIFFERENTIAL LVPECL 2x2 CLOCK SWITCH AND FANOUT BUFFER

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中文翻译

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技术参数
数据手册

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MC100ES6254FAR2 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LQFP-32	针数：	32
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.26
其他特性：	IT CAN ALSO OPERATE WITH 3.3V SUPPLY	系列：	100E
输入调节：	DIFFERENTIAL MUX	JESD-30 代码：	S-PQFP-G32
JESD-609代码：	e0	长度：	7 mm
逻辑集成电路类型：	LOW SKEW CLOCK DRIVER	湿度敏感等级：	3
功能数量：	1	反相输出次数：
端子数量：	32	实输出次数：	6
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装等效代码：	QFP32,.35SQ,32
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE
峰值回流温度（摄氏度）：	240	电源：	2.5/3.3 V
传播延迟（tpd）：	0.61 ns	认证状态：	Not Qualified
Same Edge Skew-Max（tskwd）：	0.05 ns	座面最大高度：	1.6 mm
子类别：	Clock Drivers	最大供电电压 (Vsup)：	2.625 V
最小供电电压 (Vsup)：	2.375 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	技术：	BIPOLAR
端子面层：	Tin/Lead (Sn85Pb15)	端子形式：	GULL WING
端子节距：	0.8 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	20	宽度：	7 mm
最小 fmax：	3000 MHz	Base Number Matches：	1

MC100ES6254FAR2 数据手册

2.5/3.3V DIFFERENTIAL LVPECL 2x2 CLOCK SWITCH

AND FANOUT BUFFER

MC100ES6254

The Freescale MC100ES6254 is a bipolar monolithic differential 2x2 clock switch and

fanout buffer. Designed for most demanding clock distribution systems, the

MC100ES6254 supports various applications that require a large number of outputs to

drive precisely aligned clock signals. The device is capable of driving and switching

differential LVPECL signals. Using SiGe technology and a fully differential architecture, the

device offers superior digital signal characteristics and very low clock skew error. Target

applications for this clock driver are high performance clock/data switching, clock

distribution or data loopback in computing, networking and telecommunication systems.

2.5/3.3 V DIFFERENTIAL

LVPECL 2x2

CLOCK SWITCH

AND FANOUT BUFFER

Features

•

Fully differential architecture from input to all outputs

SiGe technology supports near-zero output skew

Supports DC to 3 GHz operation⁽¹⁾of clock or data signals

LVPECL compatible differential clock inputs and outputs

LVCMOS compatible control inputs

FA SUFFIX

32-LEAD LQFP PACKAGE

CASE 873A-04

Single 3.3 V or 2.5 V supply

50 ps maximum device skew⁽¹⁾

Synchronous output enable eliminating output runt pulse generation and metastability

Standard 32 lead LQFP package

Industrial temperature range

AC SUFFIX

32-LEAD LQFP PACKAGE

Pb-FREE PACKAGE

CASE 873A-04

32-lead Pb-free package available

Functional Description

MC100ES6254 is designed for very skew critical differential clock distribution systems

and supports clock frequencies from DC up to 3.0 GHz. Typical applications for the

MC100ES6254 are primary clock distribution, switching and loopback systems of high-

performance computer, networking and telecommunication systems, as well as on-board

clocking of OC-3, OC-12 and OC-48 speed communication systems. Primary purpose of

the MC100ES6254 is high-speed clock switching applications. In addition, the

MC100ES6254 can be configured as single 1:6 or dual 1:3 LVPECL fanout buffer for clock

signals, or as loopback device in high-speed data applications.

ORDERING INFORMATION

Device

Package

LQFP-32

MC100ES6254FA

MC100ES6254FAR2

MC100ES6254AC

MC100ES6254ACR2

LQFP-32

LQFP-32 (Pb-Free)

The MC100ES6254 can be operated from a 3.3 V or 2.5 V positive supply without the

requirement of a negative supply line.

1. The device is functional up to 3 GHz and characterized up to 2.7 GHz.

IDT™ / ICS™ 2.5V/3.3V LVPECL CLOCK SWITCH AND FANOUT BUFFER

MC100ES6254 REV. 6 OCTOBER 18, 2007

12 3 4 5 6 7...9

中文翻译

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与MC100ES6254FAR2相关器件

型号	品牌	获取价格	描述	数据表
MC100ES7011HD	IDT	获取价格	Low Skew Clock Driver, 100E Series, 2 True Output(s), 0 Inverted Output(s), ECL, PDSO8, SO
MC100ES7011HD	NXP	获取价格	100E SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8, PLASTIC
MC100ES7011HDR2	NXP	获取价格	100E SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8, PLASTIC
MC100ES7011PD	NXP	获取价格	100E SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8, PLASTIC
MC100ES7011PDR2	NXP	获取价格	100E SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8, PLASTIC
MC100ES7011PDR2	IDT	获取价格	Low Skew Clock Driver, 100E Series, 2 True Output(s), 0 Inverted Output(s), ECL, PDSO8, SO
MC100ES7111	MOTOROLA	获取价格	LOW VOLTAGE 1:10 DIFFERENTIAL LVDS CLOCK FANOUT BUFFER
MC100ES7111FA	MOTOROLA	获取价格	LOW VOLTAGE 1:10 DIFFERENTIAL LVDS CLOCK FANOUT BUFFER
MC100ES8011PD	IDT	获取价格	Low Skew Clock Driver, 100E Series, 2 True Output(s), 0 Inverted Output(s), ECL, PDSO8, SO
MC100ES8011PDR2	IDT	获取价格	Low Skew Clock Driver, 100E Series, 2 True Output(s), 0 Inverted Output(s), ECL, PDSO8, SO

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