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MC100ELT21MNR4G PDF预览

MC100ELT21MNR4G

更新时间: 2024-11-29 05:22:27
品牌 Logo 应用领域
安森美 - ONSEMI 转换器电平转换器驱动程序和接口锁存器接口集成电路
页数 文件大小 规格书
8页 139K
描述
5 V Differential PECL to TTL Translator

MC100ELT21MNR4G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DFN
包装说明:HVSON, SOLCC8,.08,20针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.18
Is Samacsys:N最大延迟:5.5 ns
接口集成电路类型:PECL TO TTL TRANSLATORJESD-30 代码:S-XDSO-N8
JESD-609代码:e3长度:2 mm
位数:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出锁存器或寄存器:NONE
输出极性:TRUE封装主体材料:UNSPECIFIED
封装代码:HVSON封装等效代码:SOLCC8,.08,20
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:1 mm
子类别:Level Translators最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:2 mmBase Number Matches:1

MC100ELT21MNR4G 数据手册

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MC10ELT21, MC100ELT21  
5 VꢀDifferential PECL to  
TTL Translator  
Description  
The MC10ELT/100ELT21 is a differential PECL to TTL translator.  
Because PECL (Positive ECL) levels are used, only +5 V and ground  
are required. The small outline 8-lead package and the single gate of  
the ELT21 makes it ideal for those applications where space,  
performance and low power are at a premium.  
http://onsemi.com  
MARKING DIAGRAMS*  
The V pin, an internally generated voltage supply, is available to  
this device only. For single-ended input conditions, the unused  
BB  
8
8
8
HLT21  
ALYW  
G
KLT21  
ALYW  
G
1
differential input is connected to V as a switching reference voltage.  
BB  
V
may also rebias AC coupled inputs. When used, decouple V  
BB  
BB  
SOIC8  
D SUFFIX  
CASE 751  
1
1
and V via a 0.01 mF capacitor and limit current sourcing or sinking  
CC  
to 0.5 mA. When not used, V should be left open.  
BB  
The 100 Series contains temperature compensation.  
Features  
8
8
1
8
3.5 ns Typical Propagation Delay  
24 mA TTL Output  
Flow Through Pinouts  
1
HT21  
KT21  
ALYWG  
ALYWG  
TSSOP8  
DT SUFFIX  
CASE 948R  
G
G
1
Operating Range: V = 4.75 V to 5.25 V with GND = 0 V  
CC  
Q Output Will Default LOW with Inputs Left Open or < 1.3 V  
PbFree Packages are Available  
1
4
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
= MC10  
= MC100  
A
L
= Assembly Location  
= Wafer Lot  
5C = MC10  
2Q = MC100  
Y
W
G
= Year  
= Work Week  
= PbFree Package  
M
= Date Code  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 11  
MC10ELT21/D  

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