Datasheet > MC100ELT23_06

MC100ELT23_06

更新时间： 2024-11-24 05:22:27

品牌	Logo	应用领域
安森美 - ONSEMI		转换器
页数	文件大小	规格书
8页	134K
描述
5 V Dual Differential PECL to TTL Translator

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MC100ELT23_06 数据手册

MC100ELT23

5 VꢀDual Differential PECL

to TTL Translator

Description

The MC100ELT23 is a dual differential PECL to TTL translator.

Because PECL (Positive ECL) levels are used, only +5 V and ground

are required. The small outline 8-lead package and the dual gate

design of the ELT23 makes it ideal for applications which require the

translation of a clock and a data signal.

http://onsemi.com

MARKING DIAGRAMS*

The PECL inputs are differential; therefore, the MC100ELT23 can

accept any standard differential PECL input referenced from a V of

5.0 V.

SOIC−8

D SUFFIX

CASE 751

KLT23

ALYW

Features

• 3.5 ns Typical Propagation Delay

• 24 mA TTL Outputs

• Flow Through Pinouts

TSSOP−8

DT SUFFIX

CASE 948R

KT23

ALYWG

• The 100 Series Contains Temperature Compensation

• Operating Range V = 4.75 V to 5.25 V with GND = 0 V

• Internal Input 50 KW Pulldown Resistors

• Q Output Will Default LOW with Inputs Left Open or < 1.3 V

• Pb−Free Packages are Available

DFN8

MN SUFFIX

CASE 506AA

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Date Code

= Pb−Free Package

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Publication Order Number:

December, 2006 − Rev. 14

MC100ELT23/D

12 3 4 5 6 7 8

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