MC100EL56

更新时间： 2024-09-27 23:01:31

品牌	Logo	应用领域
安森美 - ONSEMI		复用器
页数	文件大小	规格书
4页	117K
描述
Dual Differential 2:1 Multiplexer

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MC100EL56 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The

MC100EL56 is pin and functionally equivalent to the MC100LVEL56 but

is specified for operation at the standard 100E ECL voltage supply. The

differential data path makes the device ideal for multiplexing low skew

clock or other skew sensitive signals. Multiple V

pins are provided to

ease AC coupling input signals (for more information on AC coupling ECL

signals refer to the interfacing section of the ECLinPS data book

DL140/D).

The device features both individual and common select inputs to

address both data path and random logic applications.

The differential inputs have special circuitry which ensures device

stability under open input conditions. When both differential inputs are left

DW SUFFIX

PLASTIC SOIC PACKAGE

CASE 751D–04

open the D input will pull down to V , The D input will bias around V /2

forcing the Q output LOW.

• Differential Inputs and Outputs

• 20–Lead SOIC Packaging

• 440ps Typical Propagation Delays

• Separate and Common Select

• Supports Both Standard and Low Voltage 100K ECL

• Internal Input Pulldowns

TRUTH TABLE

SEL

Data

• >2000V ESD Protection

Logic Diagram and Pinout: 20-Lead SOIC (Top View)

PIN NAMES

Pins

Function

D0a–D1a

D0b–D1b

SEL0–SEL1

COM_SEL

Q0–Q1

Input Data a

Input Data b

Individual Select Input

Common Select Input

True Outputs

SEL0

SEL1

Q0–Q1

Inverted Outputs

D0a

D0b D0b

D1a

D1b D1b

BB0

BB1

4/95

Motorola, Inc. 1996

REV 1

4–1

12 3 4

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