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MC100EL56DW PDF预览

MC100EL56DW

更新时间: 2024-02-05 20:50:38
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 复用器
页数 文件大小 规格书
4页 117K
描述
Dual Differential 2:1 Multiplexer

MC100EL56DW 技术参数

是否无铅: 含铅生命周期:Active
零件包装代码:SOIC包装说明:LEAD FREE, SOP-20
针数:20Reach Compliance Code:unknown
风险等级:5.69其他特性:NECL MODE OPERATING RANGE: VEE = -4.2 V TO -5.7 V WITH VCC = 0 V
系列:100ELJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
逻辑集成电路类型:MULTIPLEXER湿度敏感等级:NOT SPECIFIED
功能数量:2输入次数:2
输出次数:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:OPEN-EMITTER输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260传播延迟(tpd):0.62 ns
认证状态:COMMERCIAL座面最大高度:2.65 mm
最大供电电压 (Vsup):5.7 V最小供电电压 (Vsup):4.2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:7.5 mm
Base Number Matches:1

MC100EL56DW 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The  
MC100EL56 is pin and functionally equivalent to the MC100LVEL56 but  
is specified for operation at the standard 100E ECL voltage supply. The  
differential data path makes the device ideal for multiplexing low skew  
clock or other skew sensitive signals. Multiple V  
pins are provided to  
BB  
ease AC coupling input signals (for more information on AC coupling ECL  
signals refer to the interfacing section of the ECLinPS data book  
DL140/D).  
20  
The device features both individual and common select inputs to  
address both data path and random logic applications.  
1
The differential inputs have special circuitry which ensures device  
stability under open input conditions. When both differential inputs are left  
DW SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751D–04  
open the D input will pull down to V , The D input will bias around V /2  
EE  
CC  
forcing the Q output LOW.  
Differential Inputs and Outputs  
20–Lead SOIC Packaging  
440ps Typical Propagation Delays  
Separate and Common Select  
Supports Both Standard and Low Voltage 100K ECL  
Internal Input Pulldowns  
TRUTH TABLE  
SEL  
Data  
>2000V ESD Protection  
H
L
a
b
Logic Diagram and Pinout: 20-Lead SOIC (Top View)  
PIN NAMES  
Pins  
Function  
D0a–D1a  
D0b–D1b  
SEL0–SEL1  
COM_SEL  
Q0–Q1  
Input Data a  
Input Data b  
Individual Select Input  
Common Select Input  
True Outputs  
V
Q0  
19  
Q0  
18  
SEL0  
17  
SEL1  
15  
V
Q1  
13  
Q1  
12  
V
CC  
CC  
EE  
20  
16  
14  
11  
Q0–Q1  
Inverted Outputs  
1
2
3
4
5
6
7
8
9
10  
D0a  
D0a  
V
D0b D0b  
D1a  
D1a  
V
D1b D1b  
BB0  
BB1  
4/95  
Motorola, Inc. 1996  
REV 1  

MC100EL56DW 替代型号

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