MC100EL59

更新时间： 2024-11-26 23:01:31

品牌	Logo	应用领域
安森美 - ONSEMI		复用器
页数	文件大小	规格书
3页	102K
描述
Triple 2:1 Multiplexer

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数据手册

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MC100EL59 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC100LVEL59 is a triple 2:1 multiplexer with differential outputs.

The MC100EL59 is pin and functionally equivalent to the MC100LVEL59

but is specified for operation at the standard 100E ECL voltage supply.

The output data of the muxes can be controlled individually via the select

inputs or as a group via the common select input. The flexibile selection

scheme makes the device useful for both data path and random logic

applications.

• Individual or Common Select Controls

• 20–Lead SOIC Packaging

• 500ps Typical Propagation Delays

• Supports Both Standard and Low Voltage 100K ECL

• Internal Input Pulldown Resistors

• >2000V ESD Protection

DW SUFFIX

PLASTIC SOIC PACKAGE

CASE 751D–04

Logic Diagram and Pinout: 20–Lead SOIC (Top View)

TRUTH TABLE

SEL

Data

PIN NAMES

Pins

Function

D0a–D1a

D0b–D1b

SEL0–SEL1

COM_SEL

Q0–Q2

Input Data a

Input Data b

Individual Select Input

Common Select Input

True Outputs

COM_SEL D0a

D0b SEL0 D1a

D1b SEL1 D2a

D2b SEL2

Q0–Q2

Inverted Outputs

4/95

Motorola, Inc. 1996

REV 1

4–1

12 3

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