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MC100EL58MNR4 PDF预览

MC100EL58MNR4

更新时间: 2024-09-30 05:22:27
品牌 Logo 应用领域
安森美 - ONSEMI 复用器
页数 文件大小 规格书
9页 144K
描述
5.0 V ECL 2:1 Multiplexer

MC100EL58MNR4 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DFN
包装说明:DFN-8针数:8
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.51其他特性:NECL MODE OPERATING RANGE: VEE = -4.2 V TO -5.7 V WITH VCC = 0 V
系列:100ELJESD-30 代码:S-PDSO-N8
JESD-609代码:e0长度:2 mm
逻辑集成电路类型:MULTIPLEXER功能数量:1
输入次数:2输出次数:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装等效代码:SOLCC8,.08,20封装形状:SQUARE
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):240电源:-4.5 V
最大电源电流(ICC):19 mAProp。Delay @ Nom-Sup:0.38 ns
传播延迟(tpd):0.34 ns认证状态:Not Qualified
座面最大高度:1 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):5.7 V最小供电电压 (Vsup):4.2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:2 mm
Base Number Matches:1

MC100EL58MNR4 数据手册

 浏览型号MC100EL58MNR4的Datasheet PDF文件第2页浏览型号MC100EL58MNR4的Datasheet PDF文件第3页浏览型号MC100EL58MNR4的Datasheet PDF文件第4页浏览型号MC100EL58MNR4的Datasheet PDF文件第5页浏览型号MC100EL58MNR4的Datasheet PDF文件第6页浏览型号MC100EL58MNR4的Datasheet PDF文件第7页 
MC10EL58, MC100EL58  
5.0 VꢀECL 2:1 Multiplexer  
Description  
The MC10EL/100EL58 is a 2:1 multiplexer. The device is  
functionally equivalent to the E158 device with higher performance  
capabilities. With propagation delays and output transition times  
significantly faster than the E158, the EL58 is ideally suited for those  
applications which require the ultimate in AC performance.  
The 100 Series contains temperature compensation.  
http://onsemi.com  
MARKING  
DIAGRAMS*  
Features  
8
8
1
8
230 ps Propagation Delay  
1
HEL58  
KEL58  
ALYW  
G
PECL Mode Operating Range: V = 4.2 V to 5.7 V with V = 0 V  
CC  
EE  
ALYW  
G
SOIC8  
D SUFFIX  
CASE 751  
NECL Mode Operating Range: V = 0 V with V = 4.2 V to  
CC  
EE  
1
5.7 V  
Internal Input Pulldown Resistors on D , D , and SEL  
a
b
PbFree Packages are Available  
8
1
8
8
1
HL58  
ALYWG  
G
KL58  
ALYWG  
G
TSSOP8  
DT SUFFIX  
CASE 948R  
1
NC  
1
2
8
7
V
CC  
D
Q
Q
a
1
0
MUX  
1
4
1
4
Db  
3
4
6
5
DFN8  
MN SUFFIX  
CASE 506AA  
SEL  
V
EE  
H = MC10  
L
Y
= Wafer Lot  
= Year  
K
= MC100  
Figure 1. Logic Diagram and Pin Assignment  
4Z = MC10  
2O= MC100  
W = Work Week  
M = Date Code  
A
= Assembly Location  
G
= PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 7  
MC10EL58/D  

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