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MC100EL58DT PDF预览

MC100EL58DT

更新时间: 2024-09-30 05:22:27
品牌 Logo 应用领域
安森美 - ONSEMI 复用器
页数 文件大小 规格书
9页 144K
描述
5.0 V ECL 2:1 Multiplexer

MC100EL58DT 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:PLASTIC, TSSOP-8
针数:8Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:8.58
其他特性:NECL MODE OPERATING RANGE: VEE = -4.2 V TO -5.7 V WITH VCC = 0 V系列:100EL
JESD-30 代码:S-PDSO-G8JESD-609代码:e0
长度:3 mm逻辑集成电路类型:MULTIPLEXER
功能数量:1输入次数:2
输出次数:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.19
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:RAIL峰值回流温度(摄氏度):240
电源:-4.5 V最大电源电流(ICC):19 mA
Prop。Delay @ Nom-Sup:0.38 ns传播延迟(tpd):0.34 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):5.7 V
最小供电电压 (Vsup):4.2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn90Pb10)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

MC100EL58DT 数据手册

 浏览型号MC100EL58DT的Datasheet PDF文件第2页浏览型号MC100EL58DT的Datasheet PDF文件第3页浏览型号MC100EL58DT的Datasheet PDF文件第4页浏览型号MC100EL58DT的Datasheet PDF文件第5页浏览型号MC100EL58DT的Datasheet PDF文件第6页浏览型号MC100EL58DT的Datasheet PDF文件第7页 
MC10EL58, MC100EL58  
5.0 VꢀECL 2:1 Multiplexer  
Description  
The MC10EL/100EL58 is a 2:1 multiplexer. The device is  
functionally equivalent to the E158 device with higher performance  
capabilities. With propagation delays and output transition times  
significantly faster than the E158, the EL58 is ideally suited for those  
applications which require the ultimate in AC performance.  
The 100 Series contains temperature compensation.  
http://onsemi.com  
MARKING  
DIAGRAMS*  
Features  
8
8
1
8
230 ps Propagation Delay  
1
HEL58  
KEL58  
ALYW  
G
PECL Mode Operating Range: V = 4.2 V to 5.7 V with V = 0 V  
CC  
EE  
ALYW  
G
SOIC8  
D SUFFIX  
CASE 751  
NECL Mode Operating Range: V = 0 V with V = 4.2 V to  
CC  
EE  
1
5.7 V  
Internal Input Pulldown Resistors on D , D , and SEL  
a
b
PbFree Packages are Available  
8
1
8
8
1
HL58  
ALYWG  
G
KL58  
ALYWG  
G
TSSOP8  
DT SUFFIX  
CASE 948R  
1
NC  
1
2
8
7
V
CC  
D
Q
Q
a
1
0
MUX  
1
4
1
4
Db  
3
4
6
5
DFN8  
MN SUFFIX  
CASE 506AA  
SEL  
V
EE  
H = MC10  
L
Y
= Wafer Lot  
= Year  
K
= MC100  
Figure 1. Logic Diagram and Pin Assignment  
4Z = MC10  
2O= MC100  
W = Work Week  
M = Date Code  
A
= Assembly Location  
G
= PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 7  
MC10EL58/D  

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