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MC100E210FNG PDF预览

MC100E210FNG

更新时间： 2024-11-26 13:11:15
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 65K
描述
5.0 V ECL Dual 1:4, 1:5 Differential Clock/Data Fanout Buffer, 28 LEAD PLCC, 37-TUBE

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中文翻译

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MC100E210FNG 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QLCC
包装说明：QCCJ, LDCC28,.5SQ针数：28
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：8.11其他特性：NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V
系列：100E输入调节：DIFFERENTIAL
JESD-30 代码：S-PQCC-J28JESD-609代码：e3
长度：11.505 mm逻辑集成电路类型：LOW SKEW CLOCK DRIVER
湿度敏感等级：3功能数量：2
反相输出次数：端子数量：28
实输出次数：4最高工作温度：85 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC28,.5SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：260电源：-4.5 V
Prop。Delay @ Nom-Sup：0.75 ns传播延迟（tpd）：0.75 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.075 ns
座面最大高度：4.57 mm子类别：Clock Drivers
最大供电电压 (Vsup)：5.7 V最小供电电压 (Vsup)：4.2 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：ECL温度等级：OTHER
端子面层：Tin (Sn)端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：11.505 mm
Base Number Matches：1

MC100E210FNG 数据手册

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MC100E210  
5VꢀECL Dual 1:4, 1:5  
Differential Fanout Buffer  
The MC100E210 is a low voltage, low skew dual differential ECL  
fanout buffer designed with clock distribution in mind. The device  
features two fanout buffers, a 1:4 and a 1:5 buffer, on a single chip. The  
device features fully differential clock paths to minimize both device and  
system skew. The dual buffer allows for the fanout of two signals through  
a single chip, thus reducing the skew between the two fundamental  
signals from a part−to−part skew down to an output−to−output skew. This  
capability reduces the skew by a factor of 4 as compared to using two  
LVE111’s to accomplish the same task.  
http://onsemi.com  
MARKING  
DIAGRAM  
128  
The lowest TPD delay time results from terminating only one output  
pair, and the greatest TPD delay time results from terminating all the  
output pairs. This shift is about 10−20 pS in TPD. The skew between  
any two output pairs within a device is typically about 25 nS. If other  
output pairs are not terminated, the lowest TPD delay time results  
from both output pairs and the skew is typically 25 nS. When all  
outputs are terminated, the greatest TPD (delay time) occurs and all  
outputs display about the same 10−20 pS increase in TPD, so the  
relative skew between any two output pairs remains about 25 nS.  
For more information on using PECL, designers should refer to  
Application Note AN1406/D.  
MC100E210FN  
AWLYYWW  
PLCC−28  
FN SUFFIX  
CASE 776  
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
The V pin, an internally generated voltage supply, is available to this  
BB  
device only. For single-ended input conditions, the unused differential  
input is connected to V as a switching reference voltage. V may also  
*For additional information, see Application Note  
AND8002/D  
BB  
BB  
rebias AC coupled inputs. When used, decouple V and V via a  
BB  
CC  
0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When  
not used, V should be left open.  
BB  
• Dual Differential Fanout Buffers  
ORDERING INFORMATION  
• 200 ps Part−to−Part Skew  
†
Device  
Package  
Shipping  
• 50 ps Typical Output−to−Output Skew  
• Low Voltage ECL/PECL Compatible  
• The 100 Series Contains Temperature Compensation  
• 28−lead PLCC Packaging  
MC100E210FN  
MC100E210FNR2  
PLCC−28 37 Units / Rail  
PLCC−28 500 Tape & Reel  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
• PECL Mode Operating Range: V = 4.2 V to 5.7 V with V = 0 V  
CC  
EE  
• NECL Mode Operating Range: V = 0 V with V = −4.2 V to −5.7 V  
CC  
EE  
• Internal Input 75 KW Pulldown Resistors  
• Q Output will Default LOW with Inputs Open or at V  
• ESD Protection: Human Body Model; >2 KV,  
Machine Model; >200 V  
EE  
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
• Moisture Sensitivity Level 1  
For Additional Information, see Application Note AND8003/D  
• Flammability Rating: UL 94 V−0 @ 0.125 in,  
Oxygen Index: 28 to 34  
• Transistor Count = 179 devices  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
October, 2003 − Rev. 2  
MC100E210/D  
12345678

中文翻译

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MC100E210FNG 替代型号

型号 品牌 替代类型 描述 数据表
MC100E210FN ONSEMI

完全替代

 Low Voltage Dual 1:4, 1:5 Differential Fanout Buffer

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