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MB86942PFV PDF预览

MB86942PFV

更新时间: 2024-11-26 22:51:31
品牌 Logo 应用领域
富士通 - FUJITSU /
页数 文件大小 规格书
49页 560K
描述
Peripheral LSI for SPARClite

MB86942PFV 数据手册

 浏览型号MB86942PFV的Datasheet PDF文件第2页浏览型号MB86942PFV的Datasheet PDF文件第3页浏览型号MB86942PFV的Datasheet PDF文件第4页浏览型号MB86942PFV的Datasheet PDF文件第5页浏览型号MB86942PFV的Datasheet PDF文件第6页浏览型号MB86942PFV的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS07-05602-5E  
Microprocessor SPARClite  
CMOS  
Peripheral LSI for SPARClite  
MB86941/942  
DESCRIPTION  
MB86941 and MB86942 are dedicated peripheral LSIs for SPARClite*.  
The MB86941 and MB86942 are designed to enable compact configuration of high-performance systems with  
SPARClite architecture, and provide the following features.  
* : SPARC is a registered trademark of SPARC International base on technology developed by Sun Microsystems,  
Inc. SPARClite is a trademark of SPARC International, Inc. licensed exclusively to Fujitsu Microelectronics, Inc.  
FEATURES  
Direct connection to SPARClite  
Register read/write in 2 clock cycles up to 30MHz.  
Register read/write in 3 clock cycles at 40MHz (MB86941) or 50MHz (MB86942).  
Built-In On-Chip Modules:  
• Interrupt controller  
Interrupt input: 15 channels  
Each interrupt input has independent masking and trigger mode settings  
• 16-bit timer: 4 channels  
Two of the four channels have prescalers  
Each channel has five independent mode operations  
MODE0 : Periodical-interrupt  
MODE1 : Timeout-interrupt  
MODE2 : Square wave generator  
(Continued)  
PACKAGE  
144-pin Plastic QFP  
(FPT-144P-M03)  

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