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MB86960APF-G

更新时间： 2024-11-29 04:16:47

品牌	Logo	应用领域
富士通 - FUJITSU		解码器网络接口微控制器和处理器串行IO控制器通信控制器外围集成电路编码器数据传输局域网时钟
页数	文件大小	规格书
65页	461K
描述
NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE)

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中文翻译

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技术参数
数据手册

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MB86960APF-G 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	QFP, QFP100,.7X.9
针数：	100	Reach Compliance Code：	unknown
HTS代码：	8542.31.00.01	风险等级：	5.91
Is Samacsys：	N	地址总线宽度：	4
边界扫描：	NO	总线兼容性：	80X86; 680X0
最大时钟频率：	20.001 MHz	数据编码/解码方法：	NRZ; BIPH-LEVEL(MANCHESTER)
最大数据传输速率：	1.25 MBps	外部数据总线宽度：	16
JESD-30 代码：	R-PQFP-G100	JESD-609代码：	e0
长度：	20 mm	低功率模式：	YES
DMA 通道数量：		I/O 线路数量：
串行 I/O 数：	2	端子数量：	100
片上数据RAM宽度：		最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	QFP	封装等效代码：	QFP100,.7X.9
封装形状：	RECTANGULAR	封装形式：	FLATPACK
电源：	5 V	认证状态：	Not Qualified
RAM（字数）：	0	座面最大高度：	3.35 mm
子类别：	Serial IO/Communication Controllers	最大压摆率：	85 mA
最大供电电压：	5.25 V	最小供电电压：	4.75 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
宽度：	14 mm	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：	1

MB86960APF-G 数据手册

MB86960

NETWORK INTERFACE CONTROLLER

with ENCODER/DECODER (NICE)

DATA SHEET

APRIL1993

two-bank, transmit buffer which allows multiple data

packets to be “chained” together and transmitted to the

network from a single transmit command, thus allowing

greater design flexibility and throughput. Receive

packets are captured in a ring buffer which can be

configured in various sizes from 4 to 62 kilobytes,

depending onmemoryequippedandamountusedforthe

transmit buffer.

FEATURES

•

High-performance packet buffer architecture pipe-

lines data for highest throughput

20Mbyte/seconddatatransferrateto/fromthesystem

bus

on-chip buffer controller manages pointers, reduces

software overhead

Possible configurations for the system bus interface

include I/O mapping, memory mapping and DMA

access, or a combination of these. With a 20 Mbyte/sec

bandwidth, the NICE system bus interface allows you to

use the full throughput capacity of its unique packet

buffering architecture. The NICE controller’s selectable

bus modes provide both big- and little-endian byte

ordering, permitting an efficient data interface with most

microprocessors and higher-level protocols.

Efficient, configurable two bank transmit buffer and

ring receive buffer

Bus-compatible with most popular microprocessors,

including RISC

Complies with international standards for Ethernet,

ISO/ANSI/IEEE 8802-3

•

High-speed burst and single transfer DMA

64-element hash table for multicast address filtering

High-speed, low-power CMOS technology

Implemented inFujitsu’s high-speed, low-powerCMOS

process, the MB86960 is supplied in a 100-pin plastic

quad flat package for surface mounting.

Power down mode reduces power dissipation for

battery-powered equipment

PIN CONFIGURATION

•

Available in 100-pin plastic quad flat package

GENERAL DESCRIPTION

100

The MB86960 Network Interface Controller with

Encoder/Decoder (NICE ) is a high-performance,

highly integrated monolithic device which incorporates

both network controller, complete with buffer manage-

ment, and Manchester encoder/decoder. It allows

implementation of a 7-chip solution for an Ethernet

interface when used with either of Fujitsu’s bus interface

chips, the MB86953 for PC/XT/AT or the MB86954 for

Micro Channel , and either of Fujitsu’s transceiver

chips, the MBL8392A coaxial transceiver or MB86962

10BASE-T twisted-pair transceiver.

100–PIN

PLASTIC QUAD

FLAT PACK

(PQFP)

The unique buffer management architecture of the

MB86960 allows packet data to access a buffer memory

area from the host and from the network media

simultaneously, with virtually no interaction. The

network controller updates all receive and transmit

pointers internally, thus reducing the software overhead

required tocontroltheseoperations, resultinginsuperior

benchmark speed and application performance. The

NICE device has a partitionable 2, 4, 8, or 16 kilobyte,

TOP VIEW

12 3 4 5 6 7...65

中文翻译

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与MB86960APF-G相关器件

型号	品牌	获取价格	描述	数据表
MB86961A	FUJITSU	获取价格	UNIVERSAL INTERFACE FOR 10BASET
MB86961APD-G	FUJITSU	获取价格	UNIVERSAL INTERFACE FOR 10BASET
MB86961APF-G	FUJITSU	获取价格	UNIVERSAL INTERFACE FOR 10BASET
MB86961PD-G	FUJITSU	获取价格	Ethernet Transceiver, 1-Trnsvr, CMOS, PQCC44, PLASTIC, LCC-44
MB86962PD-G	FUJITSU	获取价格	Ethernet Transceiver, 1-Trnsvr, CMOS, PQCC28,
MB86962P-G	FUJITSU	获取价格	Ethernet Transceiver, 1-Trnsvr, CMOS, PDIP28,
MB86965	FUJITSU	获取价格	EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER
MB86965A	FUJITSU	获取价格	LAN Controller, CMOS, PQFP160
MB86965B	FUJITSU	获取价格	EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER
MB86965BPF-G-BND	FUJITSU	获取价格	EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER

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