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MB86978ABGL2-G PDF预览

MB86978ABGL2-G

更新时间: 2024-11-27 20:49:19
品牌 Logo 应用领域
富士通 - FUJITSU 电信电信集成电路
页数 文件大小 规格书
32页 155K
描述
Data Encryption Circuit, CMOS, PBGA288,

MB86978ABGL2-G 技术参数

生命周期:Active包装说明:FBGA, BGA288,22X22,30
Reach Compliance Code:compliant风险等级:5.8
JESD-30 代码:S-PBGA-B288端子数量:288
最高工作温度:85 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:FBGA
封装等效代码:BGA288,22X22,30封装形状:SQUARE
封装形式:GRID ARRAY, FINE PITCH电源:1.8,3.3 V
认证状态:Not Qualified子类别:Telecom Encryption Circuits
最大压摆率:450 mA表面贴装:YES
技术:CMOS电信集成电路类型:DATA ENCRYPTION CIRCUIT
温度等级:OTHER端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
Base Number Matches:1

MB86978ABGL2-G 数据手册

 浏览型号MB86978ABGL2-G的Datasheet PDF文件第2页浏览型号MB86978ABGL2-G的Datasheet PDF文件第3页浏览型号MB86978ABGL2-G的Datasheet PDF文件第4页浏览型号MB86978ABGL2-G的Datasheet PDF文件第5页浏览型号MB86978ABGL2-G的Datasheet PDF文件第6页浏览型号MB86978ABGL2-G的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS04-22115-4E  
ASSP IPsec Engine  
High-Speed IPsec Processing Engine  
MB86978A  
DESCRIPTION  
MB86978A is IPsec accelerator engine of Inline Architecture. Once setup with appropriate parameters, the device  
can perform bi-directional 100 Mbps IPsec processing at full wire speed.  
FEATURES  
Built-in RMII/MII interface of two ports  
One interface for WAN (internet) side and one for routing function side  
Complies with IEEE802.3 (DIX format)  
Supports 10/100BASE-T/TX, full/half-duplex, and auto-negotiation  
IEEE 802.3x flow control supported  
Half-duplex back pressure supported  
SMI interface for PHY device control  
(Continued)  
PACKAGE  
337-pin plastic FBGA  
288-pin plastic FBGA  
BGA-337P-M02  
BGA-288P-M13  

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