5秒后页面跳转
M74HC76TTR PDF预览

M74HC76TTR

更新时间: 2024-11-07 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
11页 511K
描述
DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

M74HC76TTR 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP-16
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.71
Is Samacsys:N其他特性:MASTER SLAVE OPERATION
系列:HC/UHJESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:J-K FLIP-FLOP
最大频率@ Nom-Sup:21000000 Hz最大I(ol):0.004 A
位数:2功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
传播延迟(tpd):190 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:NEGATIVE EDGE
宽度:4.4 mm最小 fmax:25 MHz
Base Number Matches:1

M74HC76TTR 数据手册

 浏览型号M74HC76TTR的Datasheet PDF文件第2页浏览型号M74HC76TTR的Datasheet PDF文件第3页浏览型号M74HC76TTR的Datasheet PDF文件第4页浏览型号M74HC76TTR的Datasheet PDF文件第5页浏览型号M74HC76TTR的Datasheet PDF文件第6页浏览型号M74HC76TTR的Datasheet PDF文件第7页 
M74HC76  
DUAL J-K FLIP FLOP WITH PRESET AND CLEAR  
HIGH SPEED :  
= 67MHz (TYP.) at V = 6V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
=2µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
TUBE  
V
CC  
DIP  
SOP  
M74HC76B1R  
M74HC76M1R  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 76  
M74HC76RM13TR  
M74HC76TTR  
TSSOP  
DESCRIPTION  
The M74HC76 is an high speed CMOS DUAL J-K  
FLIP FLOP WITH CLEAR fabricated with silicon  
gate C MOS technology.  
and PRESET (PR) are independent of the clock  
and are accomplished by a logic low on the  
corresponding input.  
2
Depending on with the logic level at J and K  
inputs, this device changes state on the negative  
going transition of clock pulse (CK). CLEAR (CLR)  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
August 2001  
1/11  

与M74HC76TTR相关器件

型号 品牌 获取价格 描述 数据表
M74HC77 STMICROELECTRONICS

获取价格

4-BIT D-TYPE LATCH
M74HC77-1 STMICROELECTRONICS

获取价格

4 BIT D TYPE LATCH
M74HC77B1N STMICROELECTRONICS

获取价格

HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP14, PLASTIC, DIP-14
M74HC77B1R STMICROELECTRONICS

获取价格

4-BIT D-TYPE LATCH
M74HC77C1 STMICROELECTRONICS

获取价格

HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PQCC20, PLASTIC, LCC-20
M74HC77C1R STMICROELECTRONICS

获取价格

4-BIT D-TYPE LATCH
M74HC77F1 STMICROELECTRONICS

获取价格

HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, CDIP14, FRIT SEALED, CERAMIC
M74HC77M1 STMICROELECTRONICS

获取价格

HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO14, MICRO, GULLWIING, PL
M74HC77M1R STMICROELECTRONICS

获取价格

4-BIT D-TYPE LATCH
M74HC77RM13TR STMICROELECTRONICS

获取价格

4 BIT D TYPE LATCH