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M6MGB64BM34CWG PDF预览

M6MGB64BM34CWG

更新时间: 2024-11-07 21:15:39
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瑞萨 - RENESAS /
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3页 56K
描述
M6MGB64BM34CWG

M6MGB64BM34CWG 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.84
Base Number Matches:1

M6MGB64BM34CWG 数据手册

 浏览型号M6MGB64BM34CWG的Datasheet PDF文件第2页浏览型号M6MGB64BM34CWG的Datasheet PDF文件第3页 
Renesas LSIs  
Preliminary  
Notice: This is not a final specification.  
Some parametric limits are subject to change.  
M6MGB/T64BM34CWG  
67,108,864-BIT (4,194,304-WORD BY 16-BIT) CMOS FLASH MEMORY  
33,554,432-BIT (2,097,152-WORD BY 16-BIT) CMOS MOBILE RAM  
&
Stacked-CSP ( Chip Scale Package)  
Description  
The M6MGB/T64BM34CWG is a Stacked Chip Scale  
Package (S-CSP) that contents 64M-bit Flash memory and  
32M-bit Mobile RAM in a 67-pin Stacked CSP for lead free use.  
The M6MGB/T64BM34CWG is suitable for a high  
performance cellular phone and a mobile PC that are  
required to be small mounting area, weight and small power  
dissipation.  
64M-bit Flash memory is a 4,194,304 words, single power  
supply and high performance non-volatile memory fabricated  
by CMOS technology for the peripheral circuit and DINOR IV  
(Divided bit-line NOR IV) architecture for the memory cell. All  
memory blocks are locked and can not be programmed or  
erased, when F-WP# is Low. Using Software Lock Release  
function, program or erase operation can be executed.  
Features  
Access Time  
Flash  
85ns (Max.)  
85ns (Max.)  
Mobile RAM  
Supply Voltage  
F-VCC=M-VCC=2.7 ~ 3.0V  
Ta=-40 ~ 85 degree  
67pin S-CSP  
Ambient Temperature  
Package  
32M-bit Mobile RAM is a 2,097,152 words high density RAM  
fabricated by CMOS technology for the peripheral circuit and  
DRAM cell for the memory array. The interface is compatible  
to an asynchronous SRAM.  
Ball pitch 0.80mm  
Outer-ball:Su-Ag-Cu  
The cells are automatically refreshed and the refresh control is  
not required for system. The device also has the partial block  
refresh scheme and the power down mode by writing the  
command.  
Application  
Mobile communication products  
PIN CONFIGURATION (TOP VIEW)  
INDEX(Laser Marking)  
8
4
5
6
7
1
2
3
NC  
NC  
A
NC  
NC  
NC  
B
C
D
E
F
M-  
GND  
F-  
M-  
F-  
A16 A20  
A18  
A17  
A7  
LB#  
WP#  
WE#  
F-  
RY/BY#  
M-  
UB#  
F-  
RP#  
A8  
A11  
A15  
A14  
A13  
A12  
A5  
A4  
NC  
M-  
OE#  
A21 A10  
A9  
A19  
DQ11  
A0  
A6  
F-  
CE#  
DQ13 DQ15  
M-  
DQ9  
DQ8  
DQ0  
DQ12  
NC  
A3  
A2  
G
H
J
F-  
GND  
DQ10  
DQ2  
DQ6  
WE#  
F-  
OE#  
F-  
GND  
M-  
VCC  
DQ4  
DQ5  
DQ14  
DQ7  
A1  
M-  
CE#  
F-  
VCC  
DQ1  
DQ3  
NC  
NC  
NC  
NC  
K
L
NC  
NC  
M
(Top View)  
8.5 mm  
F-VCC  
M-VCC  
F-GND  
M-GND  
A0-A20  
A21  
DQ0-DQ15 :Data I/O  
F-CE#  
M-CE#  
:VCC for Flash Memory  
:VCC for Mobile RAM  
:GND for Flash Memory  
:GND for Mobile RAM  
:Common address for Flash/Mobile RAM  
:address for Flash  
F-RY/BY# : Flash Memory Ready /Busy  
F-OE#  
M-OE#  
F-WE#  
M-WE#  
F-WP#  
F-RP#  
M-LB#  
M-UB#  
:Output enable for Flash Memory  
:Output enable for Mobile RAM  
:Write enable for Flash Memory  
:Write enable for Mobile RAM  
:Write protect for Flash  
:Reset power down for Flash  
:Lower byte control for Mobile RAM  
:Upper byte control for Mobile RAM  
:Flash chip enable  
:Mobile RAM chip enable  
NC  
: Non Connection  
Rev.0.0.48a_bbzb  
1

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