Datasheet > M54HCT27

M54HCT27

更新时间： 2024-09-26 22:57:55

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输入元件
页数	文件大小	规格书
9页	235K
描述
TRIPLE 3-INPUT NOR GATE

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中文翻译

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数据手册

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M54HCT27 数据手册

M54HCT27

M74HCT27

TRIPLE 3-INPUT NOR GATE

HIGH SPEED

t_PD= 9 ns (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 1 µA (MAX.) AT T_A= 25 °C

COMPATIBLE WITH TTL OUTPUTS

V_IH= 2V (MIN.) V_IL= 0.8V (MAX)

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

IOH = I_OL= 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

PIN AND FUNCTION COMPATIBLE WITH

B1R

(Plastic Package)

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

54/74LS27

ORDER CODES :

DESCRIPTION

M54HCT27F1R

M74HCT27M1R

M74HCT27B1R

M74HCT27C1R

The M54/74HCT27 is a high speed CMOS TRIPLE

3-INPUT NOR GATE fabricated in silicon gate

C²MOS technology.

It has the same high speed performance of LSTTL

combined with true CMOS low power consumption.

The internal circuit is composed of 3 stages includ-

ing bufferedoutput, which gives highnoise immunity

and a stable output. All inputs areequipped with pro-

tectioncircuits against static discharge and transient

excess voltage. This integrated circuit has input and

output characteristics that are fully compatible with

54/74 LSTTL logic families. M54/74HCT devices

are designed to directly interface HSC²MOS sys-

tems with TTL and NMOS components. They are

also plug in replacements for LSTTL devices giving

a reduction of power consumption.

PIN CONNECTIONS (top view)

INPUT AND OUTPUT EQUIVALENT CIRCUIT

NC =

No Internal

Connection

February 1993

1/9

12 3 4 5 6 7...9

中文翻译

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