Datasheet > M40Z111WSH

M40Z111WSH

更新时间： 2024-09-15 22:08:39

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		静态存储器控制器
页数	文件大小	规格书
12页	91K
描述
NVRAM CONTROLLER for up to TWO LPSRAM

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中文翻译

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数据手册

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M40Z111WSH 数据手册

M40Z111

M40Z111W

NVRAM CONTROLLER for up to TWO LPSRAM

CONVERT LOW POWER SRAMs into

SNAPHAT (SH)

Battery

NVRAMs

PRECISION POWER MONITORING and

POWER SWITCHING CIRCUITRY

AUTOMATIC WRITE-PROTECTION when V_CC

is OUT-OF-TOLERANCE

CHOICE of SUPPLY VOLTAGES and

POWER-FAIL DESELECT VOLTAGES:

– M40Z111:

V_CC= 4.5V to 5.5V

THS = V_SS4.5V ≤ V_PFD≤ 4.75V

THS = V_OUT4.2V ≤ V_PFD≤ 4.5V

– M40Z111W:

SOH28 (MH)

V_CC= 3.0V to 3.6V

THS = V_SS2.8V ≤ V_PFD≤ 3.0V

V_CC= 2.7V to 3.3V

THS = V_OUT2.5 ≤ V_PFD≤ 2.7V

Figure 1. Logic Diagram

LESS THAN 15ns CHIP ENABLE ACCESS

PROPAGATION DELAY (for 5.0V device)

PACKAGING INCLUDES a 28-LEAD SOIC

and SNAPHAT^®TOP

(to be Ordered Separately)

SOIC PACKAGE PROVIDES DIRECT

CONNECTION for a SNAPHAT TOP which

CONTAINS the BATTERY

DESCRIPTION

The M40Z111/111W NVRAM Controller is a self-

contained device which converts a standard low-

power SRAM into a non-volatile memory.

THS

OUT

M40Z111

M40Z111W

A precision voltage reference and comparator

monitors the V_CCinput for an out-of-tolerance con-

dition.

CON

Table 1. Signal Names

THS

Threshold Select Input

Chip Enable Input

Conditioned Chip Enable Output

Supply Voltage Output

Supply Voltage

AI02238B

E_CON

V_OUT

V_CC

V_SS

Ground

February 1999

1/12

12 3 4 5 6 7...12

中文翻译

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