Datasheet > M40Z300_10

M40Z300_10

更新时间： 2024-09-15 11:50:27

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		静态存储器
页数	文件大小	规格书
25页	428K
描述
5 V or 3 V NVRAM supervisor for up to 8 LPSRAMs

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中文翻译

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数据手册

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M40Z300_10 数据手册

M40Z300

M40Z300W

5 V or 3 V NVRAM supervisor for up to 8 LPSRAMs

Not recommended for new design

Features

■ Converts low power SRAM into NVRAMs

■ Precision power monitoring and power

switching circuitry

■ Automatic WRITE-protection when V is out-

of-tolerance

■ Two-input decoder allows control for up to

8 SRAMs (with 2 devices active in parallel)

■ Choice of supply voltages and power-fail

SO16 (MQ)

deselect voltages:

– M40Z300:

= 4.5 V to 5.5 V

THS = V : 4.5 V ≤ V

≤ 4.75 V

≤ 4.5 V

PFD

THS = V

: 4.2 V ≤ V

OUT

PFD

– M40Z300W:

= 3.0 V to 3.6 V

SNAPHAT (SH)

crystal/battery

THS = V : 2.8 V ≤ V

≤ 3.0 V

≤ 2.7 V

PFD

= 2.7 V to 3.3 V

THS = V

: 2.5 V ≤ V

OUT

PFD

■ Reset output (RST) for power on reset

■ Battery low pin (BL)

■ Less than 12 ns chip enable access

propagation delay (for 5.0 V device)

■ Packaging includes a 28-lead SOIC and

SNAPHAT top (to be ordered separately), or

A 16-lead SOIC

■ SOIC package provides direct connection for a

SOH28 (MH)

SNAPHAT top which contains the battery

■ RoHS compliant

– Lead-free second level interconnect

October 2010

Doc ID 5679 Rev 5

1/25

This is information on a product still in production but not recommended for new designs.

www.st.com

12 3 4 5 6 7...25

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