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M28LV16 PDF预览

M28LV16

更新时间: 2024-09-18 21:54:23
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
17页 125K
描述
16K (2K x 8) LOW VOLTAGE PARALLEL EEPROM with SOFTWARE DATA PROTECTION

M28LV16 数据手册

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M28LV16  
16K (2K x 8) LOW VOLTAGE PARALLEL EEPROM  
with SOFTWARE DATA PROTECTION  
NOT FOR NEW DESIGN  
FAST ACCESS TIME: 200ns  
SINGLE LOW VOLTAGE OPERATION  
LOW POWER CONSUMPTION  
FAST WRITE CYCLE:  
– 64 Bytes Page WriteOperation  
– Byte or Page Write Cycle: 3ms Max  
ENHANCED END OF WRITE DETECTION:  
– Data Polling  
24  
1
PDIP24 (P)  
PLCC32 (K)  
– ToggleBit  
PAGE LOAD TIMER STATUS BIT  
HIGH RELIABILITYSINGLE POLYSILICON,  
CMOS TECHNOLOGY:  
24  
– Endurance >100,000 Erase/Write Cycles  
– Data Retention >40 Years  
JEDEC APPROVED BYTEWIDE PIN OUT  
SOFTWARE DATA PROTECTION  
1
SO24 (MS)  
300 mils  
TSOP28 (N)  
8 x 13.4mm  
M28LV16 is replaced by the products  
described on the document M28C16A  
Figure 1. Logic Diagram  
DESCRIPTION  
The M28LV16 is a 2K x 8 low power Parallel  
EEPROMfabricatedwithSGS-THOMSONproprie-  
tary single polysilicon CMOS technology. The de-  
vice offers fast access time with low power  
dissipation and requires a 2.7V to 3.6V power  
supply. The circuit has been designed to offer a  
flexible microcontroller interface featuring both  
hardware and software handshaking with Data  
Polling and Toggle Bit. The M28LV16 supports 64  
byte page write operation. ASoftware DataProtec-  
tion (SDP) is also possible using the standard  
JEDEC algorithm.  
V
CC  
11  
8
A0-A10  
DQ0-DQ7  
W
E
M28LV16  
Table 1. Signal Names  
RB *  
A0 - A10  
Address Input  
G
DQ0 - DQ7 Data Input / Output  
W
Write Enable  
Chip Enable  
Output Enable  
Ready / Busy  
Supply Voltage  
Ground  
E
V
SS  
G
AI01567B  
RB  
VCC  
VSS  
Note: * RB function is offered only with TSOP28 package.  
November 1997  
1/17  
This is information on a product still in production but not recommended for new design.  

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