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M27V160-100M6TR PDF预览

M27V160-100M6TR

更新时间: 2024-10-26 22:55:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路光电二极管可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
15页 105K
描述
16 Mbit 2Mb x8 or 1Mb x16 Low Voltage UV EPROM and OTP EPROM

M27V160-100M6TR 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.525 INCH, ROHS COMPLIANT, PLASTIC, SOP-44
针数:44Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.83Is Samacsys:N
最长访问时间:100 ns备用内存宽度:8
I/O 类型:COMMONJESD-30 代码:R-PDSO-G44
JESD-609代码:e3长度:28.2 mm
内存密度:16777216 bit内存集成电路类型:OTP ROM
内存宽度:16功能数量:1
端子数量:44字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:1MX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP44,.63封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
峰值回流温度(摄氏度):245电源:3.3 V
认证状态:Not Qualified座面最大高度:2.8 mm
最大待机电流:0.00006 A子类别:OTP ROMs
最大压摆率:0.03 mA最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:13.3 mmBase Number Matches:1

M27V160-100M6TR 数据手册

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M27V160  
16 Mbit (2Mb x8 or 1Mb x16)  
Low Voltage UV EPROM and OTP EPROM  
3V to 3.6V LOW VOLTAGE in READ  
OPERATION  
ACCESS TIME: 100ns  
BYTE-WIDE or WORD-WIDE  
44  
42  
CONFIGURABLE  
16 Mbit MASK ROM REPLACEMENT  
LOW POWER CONSUMPTION  
– Active Current 30mA at 8MHz  
– Standby Current 60µA  
1
1
FDIP42W (F)  
SO44 (M)  
PROGRAMMING VOLTAGE: 12.5V ± 0.25V  
PROGRAMMING TIME: 50µs/word  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
42  
– Device Code: B1h  
1
PDIP42 (B)  
DESCRIPTION  
The M27V160 is a low voltage 16 Mbit EPROM of-  
fered in the two ranges UV (ultra violet erase) and  
OTP (one time programmable). It is ideally suited  
for microprocessor systems requiring large data or  
program storage. It is organised as either 2 Mbit  
words of 8 bit or 1 Mbit words of 16 bit. The pin-out  
is compatible with a 16 Mbit Mask ROM.  
The M27V160 operates in the read mode with a  
supply voltage as low as 3V. The decrease in op-  
erating power allows either a reduction of the size  
of the battery or an increase in the time between  
battery recharges.  
Figure 1. Logic Diagram  
V
CC  
20  
Q15A–1  
A0-A19  
15  
The FDIP42W (window ceramic frit-seal package)  
has a transparent lid which allows the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern. A new pattern can then be written rapidly to  
the device by following the programming proce-  
dure.  
For applications where the content is programmed  
only one time and erasure is not required, the  
M27V160 is offered in PDIP42 and SO44 packag-  
es.  
Q0-Q14  
E
M27V160  
G
BYTEV  
PP  
V
SS  
AI01898  
March 2000  
1/15  

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