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M27V101-100N1TR PDF预览

M27V101-100N1TR

更新时间: 2024-10-26 22:11:19
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路光电二极管可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
15页 106K
描述
1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM

M27V101-100N1TR 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:TSOP包装说明:8 X 20 MM, PLASTIC, TSOP-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.91Is Samacsys:N
最长访问时间:100 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G32JESD-609代码:e0
长度:18.4 mm内存密度:1048576 bit
内存集成电路类型:OTP ROM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装等效代码:TSSOP32,.8,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL电源:3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.00002 A子类别:OTP ROMs
最大压摆率:0.015 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL宽度:8 mm
Base Number Matches:1

M27V101-100N1TR 数据手册

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M27V101  
1 Mbit (128Kb x 8) Low Voltage UV EPROM and OTP EPROM  
LOW VOLTAGE READ OPERATION:  
3V to 3.6V  
FAST ACCESS TIME: 90ns  
LOW POWER CONSUMPTION:  
32  
32  
– Active Current 15mA at 5MHz  
– Standby Current 20µA  
1
1
PROGRAMMING VOLTAGE: 12.75V ± 0.25V  
PROGRAMMING TIME: 100µs/byte (typical)  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
FDIP32W (F)  
PDIP32 (B)  
– Device Code: 05h  
DESCRIPTION  
The M27V101 is a low voltage 1 Mbit EPROM of-  
fered in the two ranges UV (ultra violet erase) and  
OTP (one time programmable). It is ideally suited  
for microprocessor systems requiring large data or  
program storage and is organized as 131,072 by 8  
bits.  
PLCC32 (K)  
TSOP32 (N)  
8 x 20 mm  
Figure 1. Logic Diagram  
The M27V101 operates in the read mode with a  
supply voltage as low as 3V. The decrease in op-  
erating power allows either a reduction of the size  
of the battery or an increase in the time between  
battery recharges.  
V
V
PP  
CC  
The FDIP32W (window ceramic frit-seal package)  
has a transparent lid which allow the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern.  
17  
8
A0-A16  
Q0-Q7  
Table 1. Signal Names  
P
E
A0-A16  
Address Inputs  
Data Outputs  
Chip Enable  
Output Enable  
Program  
M27V101  
Q0-Q7  
E
G
P
G
V
SS  
V
Program Supply  
Supply Voltage  
Ground  
PP  
AI00660B  
V
CC  
V
SS  
May 1998  
1/15  

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