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LTC2159 PDF预览

LTC2159

更新时间: 2024-09-13 14:58:15
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
32页 519K
描述
16位、20Msps、低功耗ADC

LTC2159 数据手册

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LTC2159  
16-Bit, 20Msps  
Low Power ADC  
FeaTures  
DescripTion  
TheLTC®2159isasampling16-bitA/Dconverterdesigned  
for digitizing high frequency, wide dynamic range signals.  
It is perfect for demanding communications applications  
with AC performance that includes 77dB SNR and 90dB  
spurious free dynamic range (SFDR). Ultralow jitter of  
n
77dB SNR  
n
90dB SFDR  
n
Low Power: 43mW  
n
Single 1.8V Supply  
n
CMOS, DDR CMOS, or DDR LVDS Outputs  
n
Selectable Input Ranges: 1V to 2V  
0.07ps  
allows undersampling of IF frequencies with  
P-P  
P-P  
RMS  
n
n
n
n
n
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550MHz Full Power Bandwidth S/H  
Optional Data Output Randomizer  
Optional Clock Duty Cycle Stabilizer  
Shutdown and Nap Modes  
excellent noise performance.  
DC specs include 2LSB INL (typ), 0.5LSB DNL (typ)  
and no missing codes over temperature. The transition  
noise is 3.2LSB  
.
RMS  
Serial SPI Port for Configuration  
The digital outputs can be either full rate CMOS, double  
data rate CMOS, or double data rate LVDS. A separate  
output power supply allows the CMOS output swing to  
range from 1.2V to 1.8V.  
48-Lead (7mm × 7mm) QFN Package  
applicaTions  
n
+
Communications  
The ENC and ENC inputs may be driven differentially  
or single-ended with a sine wave, PECL, LVDS, TTL, or  
CMOS inputs. An optional clock duty cycle stabilizer al-  
lows high performance at full speed for a wide range of  
clock duty cycles.  
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Cellular Base Stations  
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Software Defined Radios  
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Portable Medical Imaging  
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Multichannel Data Acquisition  
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Nondestructive Testing  
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
Typical applicaTion  
Integral Non-Linearity (INL)  
1.8V  
1.8V  
OV  
V
DD  
DD  
4.0  
3.0  
2.0  
16-BIT  
ADC CORE  
ANALOG  
INPUT  
S/H  
D15  
D0  
1.0  
0
CMOS  
DDR CMOS OR  
DDR LVDS  
OUTPUTS  
OUTPUT  
DRIVERS  
–1.0  
–2.0  
–3.0  
–4.0  
20MHz  
CLOCK  
CLOCK  
CONTROL  
0
32768  
49152  
65536  
16384  
OUTPUT CODE  
2159 TA01a  
GND  
OGND  
2159 TA01b  
2159f  
1

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