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LS4391(TO-18)

更新时间: 2024-11-02 21:10:59
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描述
Transistor

LS4391(TO-18) 数据手册

  
LS4391  
Single N-Channel JFET switch  
Linear Systems replaces discontinued Siliconix 2N4391  
FEATURES  
The LS4391 features many of the superior  
DIRECT REPLACEMENT FOR SILICONIX 2N4391  
LOW ON RESISTANCE  
characteristics of JFETs which make it a good choice  
for demanding analog switching applications and for  
specialized amplifier circuits.  
rDS(on) 30Ω  
ID(off) = 5pA  
t(ON) = 15ns  
LOW GATE OPERATING CURRENT  
FAST SWITCHING  
LS4391 Benefits:  
ABSOLUTE MAXIMUM RATINGS1 @ 25°C (unless otherwise noted)  
ƒ
ƒ
ƒ
ƒ
ƒ
Low Error Voltage  
Maximum Temperatures  
Storage Temperature  
Operating Junction Temperature  
Maximum Power Dissipation  
Continuous Power Dissipation  
MAXIMUM CURRENT  
Gate Current (Note 1)  
MAXIMUM VOLTAGES  
Gate to Drain Voltage / Gate to Source Voltage  
High-Speed Analog Circuit Performance  
Negligible “Off-Error,” Excellent Accuracy  
Good Frequency Response, Low Glitches  
Eliminates Additional Buffering  
65°C to +200°C  
55°C to +200°C  
1800mW  
IG = 50mA  
40V  
LS4391 Applications:  
ƒ
ƒ
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Analog Switches  
Choppers, Sample-and-Hold  
Normally “On” Switches, Current Limiters  
LS4391 ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)  
SYMBOL  
BVGSS  
VGS(off)  
VGS(F)  
VDS(on)  
VDS(on)  
VDS(on)  
IDSS  
CHARACTERISTIC  
Gate to Source Breakdown Voltage  
Gate to Source Cutoff Voltage  
Gate to Source Forward Voltage  
Drain to Source On Voltage  
Drain to Source On Voltage  
Drain to Source On Voltage  
Drain to Source Saturation Current2  
Gate Reverse Current  
MIN  
40  
4  
‐‐  
‐‐  
‐‐  
‐‐  
50  
‐‐  
‐‐  
‐‐  
TYP.  
‐‐  
‐‐  
0.7  
0.25  
0.3  
0.35  
‐‐  
MAX  
‐‐  
10  
1
‐‐  
‐‐  
0.4  
150  
100  
‐‐  
UNITS  
V
CONDITIONS  
IG = 1µA, VDS = 0V  
VDS = 20V, ID = 1nA  
IG = 1mA, VDS = 0V  
VGS = 0V, ID = 3mA  
VGS = 0V, ID = 6mA  
VGS = 0V, ID = 12mA  
VDS = 20V, VGS = 0V  
VGS = 20V, VDS = 0V  
VDG = 15V, ID = 10mA  
mA  
pA  
IGSS  
IG  
5  
5  
5
Gate Operating Current  
‐‐  
VDS = 20V, VGS = 5V  
ID(off)  
Drain Cutoff Current  
‐‐  
‐‐  
‐‐  
5
5
‐‐  
‐‐  
100  
30  
VDS = 20V, VGS = 7V  
VDS = 20V, VGS = 12V  
VGS = 0V, ID = 1mA  
rDS(on)  
Drain to Source On Resistance  
Ω
LS4391 DYNAMIC ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)  
SYMBOL  
CHARACTERISTIC  
TYP  
MIN  
MAX  
UNITS  
CONDITIONS  
Click To Buy  
gfs  
Forward Transconductance  
6
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
mS  
µS  
Ω
VDS = 20V, ID = 1mA, f = 1kHz  
VDS = 20V, ID = 1mA, f = 1kHz  
VGS = 0V, ID = 0A, f = 1kHz  
gos  
Output Conductance  
25  
‐‐  
‐‐  
rds(on)  
Ciss  
Drain to Source On Resistance  
Input Capacitance  
30  
14  
‐‐  
12  
3.3  
3.2  
2.8  
3
VDS = 20V, VGS = 0V, f = 1MHz  
VDS = 0V, VGS = 5V, f = 1MHz  
VDS = 0V, VGS = 7V, f = 1MHz  
VDS = 0V, VGS = 12V, f = 1MHz  
VDS = 10V, ID = 10mA, f = 1kHz  
Crss  
pF  
Reverse Transfer Capacitance  
Crss  
‐‐  
Crss  
3.5  
en  
Equivalent Input Noise Voltage  
‐‐  
nV/Hz  
LS4391 SWITCHING ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)  
SYMBOL  
td(on)  
tr  
CHARACTERISTIC  
TYP  
2
MIN  
‐‐  
MAX  
15  
5
UNITS  
CONDITIONS  
Turn On Time  
2
‐‐  
ns  
VDD = 10V, VGS(H) = 0V  
td(off)  
tf  
6
‐‐  
20  
15  
Turn Off Time  
13  
‐‐  
Notes: 1. Absolute ratings are limiting values above which serviceability may be impaired  
2. Pulse test: PW 300µs, Duty Cycle 3%  
LS4391 SWITCHING CIRCUIT PARAMETERS  
SWITCHING CIRCUIT  
VGS(L)  
RL  
12V  
800Ω  
12mA  
TO-18 (Bottom View)  
Micross Components Europe  
ID(on)  
Available Packages:  
Tel: +44 1603 788967  
Email: chipcomponents@micross.com  
Web: http://www.micross.com/distribution  
LS4391 in TO-18  
LS4391 in bare die.  
Contact Micross for full package and die dimensions  
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or  
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.  

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