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LS312_SOIC

更新时间： 2024-09-29 11:43:39
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MICROSS 晶体晶体管
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MONOLITHIC DUAL NPN TRANSISTOR

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LS312_SOIC 数据手册

  
LS312  
MONOLITHIC DUAL  
NPN TRANSISTOR  
Linear Systems High Voltage Super-Beta Monolithic Dual NPN  
FEATURES  
HIGH GAIN  
The LS312 is a monolithic pair of NPN transistors  
hFE ≥ 200 @ 10µA‐1mA  
|VBE1 – VBE2 |= 0.2mV TYP.  
250MHz TYP. @ 1mA  
mounted in a single P-DIP package. The monolithic  
dual chip design reduces parasitics and gives better  
performance while ensuring extremely tight matching.  
TIGHT VBE MATCHING  
HIGH ft  
ABSOLUTE MAXIMUM RATINGS 1  
@ 25°C (unless otherwise noted)  
The 8 Pin P-DIP provides ease of manufacturing, and  
the symmetrical pinout prevents improper orientation.  
Maximum Temperatures  
Storage Temperature  
(See Packaging Information).  
‐65°C to +200°C  
‐55°C to +150°C  
Operating Junction Temperature  
Maximum Power Dissipation  
Continuous Power Dissipation (One side)  
Continuous Power Dissipation (Both sides)  
Linear Derating factor (One side)  
Linear Derating factor (Both sides)  
Maximum Currents  
LS312 Features:  
250mW  
500mW  
2.3mW/°C  
4.3mW/°C  
ƒ
ƒ
ƒ
Very high gain  
Tight matching  
Low Output Capacitance  
Collector Current  
10mA  
MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated)  
SYMBOL  
|VBE1 – VBE2  
∆|(VBE1 – VBE2)| / ∆T  
CHARACTERISTIC  
Base Emitter Voltage Differential  
Base Emitter Voltage Differential  
Change with Temperature  
Base Current Differential  
MIN  
‐‐  
‐‐  
TYP  
0.2  
0.5  
MAX  
0.5  
2
UNITS  
mV  
µV/°C  
CONDITIONS  
|
IC = 10µA, VCE = 5V  
IC = 10µA, VCE = 5V  
TA = ‐55°C to +125°C  
IC = 10µA, VCE = 5V  
|IB1 – IB2  
|
‐‐  
‐‐  
‐‐  
‐‐  
5
nA  
|∆ (IB1 – IB2)|/°C  
Base Current Differential  
Change with Temperature  
DC Current Gain Differential  
0.3  
nA/°C  
IC = 10µA, VCE = 5V  
TA = ‐55°C to +125°C  
IC = 10µA, VCE = 5V  
hFE1 /hFE2  
‐‐  
5
‐‐  
%
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)  
Click To Buy  
SYMBOL  
BVCBO  
BVCEO  
BVEBO  
BVCCO  
CHARACTERISTICS  
Collector to Base Voltage  
Collector to Emitter Voltage  
Emitter‐Base Breakdown Voltage  
Collector to Collector Voltage  
MIN.  
60  
60  
6.2  
100  
200  
200  
200  
‐‐  
TYP.  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
MAX.  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
UNITS  
CONDITIONS  
IC = 10µA, IE = 0  
V
V
V
V
IC = 10µA, IB = 0  
IE = 10µA, IC = 02  
IC = 10µA, IE = 0  
IC = 10µA, VCE = 5V  
IC = 100µA, VCE = 5V  
IC = 1mA, VCE = 5V  
IC = 1mA, IB = 0.1mA  
IE = 0, VCB = 3V  
hFE  
DC Current Gain  
VCE(SAT)  
IEBO  
ICBO  
COBO  
CC1C2  
IC1C2  
fT  
Collector Saturation Voltage  
Emitter Cutoff Current  
Collector Cutoff Current  
‐‐  
‐‐  
‐‐  
‐‐  
0.25  
0.2  
0.2  
2
V
nA  
nA  
pF  
‐‐  
‐‐  
‐‐  
IE = 0, VCB = 30V  
IE = 0, VCB = 5V  
Output Capacitance  
Collector to Collector Capacitance  
Collector to Collector Leakage Current  
Current Gain Bandwidth Product  
Narrow Band Noise Figure  
‐‐  
‐‐  
200  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
2
0.5  
‐‐  
pF  
VCC = 0V  
VCC = ±45V  
nA  
MHz  
dB  
IC = 1mA, VCE = 5V  
IC = 100µA, VCE = 5V, BW=200Hz, RG= 10KΩ,  
f = 1KHz  
NF  
3
Notes:  
1. Absolute Maximum ratings are limiting values above which serviceability may be impaired  
2. The reverse base‐to‐emitter voltage must never exceed 6.2 volts; the reverse base‐to‐emitter current must never exceed 10µA.  
P-DIP (Top View)  
Available Packages:  
LS312 in P-DIP  
LS312 available as bare die  
Please contact Micross for full package and die dimensions:  
Email: chipcomponents@micross.com  
Web: www.micross.com/distribution.aspx  
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or  
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.  
1

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