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LQFP64

更新时间: 2024-11-05 03:37:31
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
429页 4228K
描述
8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TM(EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

LQFP64 数据手册

 浏览型号LQFP64的Datasheet PDF文件第2页浏览型号LQFP64的Datasheet PDF文件第3页浏览型号LQFP64的Datasheet PDF文件第4页浏览型号LQFP64的Datasheet PDF文件第5页浏览型号LQFP64的Datasheet PDF文件第6页浏览型号LQFP64的Datasheet PDF文件第7页 
ST92F124/ST92F150/ST92F250  
8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM,  
E3 TM(EMULATED EEPROM), CAN 2.0B AND J1850 BLPD  
Memories  
– Internal Memory: Single Voltage FLASH up to 256  
3 TM  
Kbytes, RAM up to 8Kbytes, 1K byte E  
ed EEPROM)  
(Emulat-  
– In-Application Programming (IAP)  
– 224 general purpose registers (register file) availa-  
ble as RAM, accumulators or index pointers  
LQFP64  
14x14  
PQFP100  
14x20  
Clock, Reset and Supply Management  
– Register-oriented 8/16 bit CORE with RUN, WFI,  
SLOW, HALT and STOP modes  
LQFP100  
– 0-24 MHz Operation (Int. Clock), 4.5-5.5 V range  
– PLL Clock Generator (3-5 MHz crystal)  
– Minimum instruction time: 83 ns (24 MHz int. clock)  
Up to 80 I/O pins  
14x14  
Communication Interfaces  
– Serial Peripheral Interface (SPI) with Selectable  
Master/Slave mode  
– One Multiprotocol Serial Communications Interface  
with asynchronous and synchronous capabilities  
– One asynchronous Serial Communications Interface  
with 13-bit LIN Synch Break generation capability  
– J1850 Byte Level Protocol Decoder (JBLPD)  
– Up to two full I²C multiple Master/Slave Interfaces  
supporting Access Bus  
Interrupt Management  
– 4 external fast interrupts + 1 NMI  
– Up to 16 pins programmable as wake-up or addition-  
al external interrupt with multi-level interrupt handler  
DMA controller for reduced processor  
overhead  
Timers  
– Up to two CAN 2.0B Active interfaces  
– 16-bit Timer with 8-bit Prescaler, and Watchdog Tim-  
Analog peripheral (low current coupling)  
er (activated by software or by hardware)  
– 10-bit A/D Converter with up to 16 robust input chan-  
nels  
Development Tools  
– 16-bit Standard Timer that can be used to generate  
a time base independent of PLL Clock Generator  
– Two 16-bit independent Extended Function Timers  
(EFTs) with Prescaler, up to two Input Captures and  
up to two Output Compares  
– Two 16-bit Multifunction Timers, with Prescaler, up  
to two Input Captures and up to two Output Com-  
pares  
– Free High performance Development environment  
(IDE) based on Visual Debugger, Assembler, Linker,  
and C-Compiler; Real Time Operating System (OS-  
EK OS, CMX) and CAN drivers  
– Hardware Emulator and Flash Programming Board  
for development and ISP Flasher for production  
DEVICE SUMMARY 2)  
Features  
ST92F124R9/1 ST92F124V1 ST92F150CR9/1 ST92F150CV9/1 ST92F150JDV1 ST92F250CV2  
FLASH - bytes  
64K/128K  
2K/4K  
1K  
128K  
4K  
1K  
64K/128K  
2K/4K  
1K  
64K/128K  
2K/4K  
1K  
128K  
6K  
1K  
256K  
8K  
1K  
RAM - bytes  
3 TM  
E
- bytes  
Timers and  
Serial  
Interface  
2 MFT, 2 EFT, 2 MFT, 2 EFT, 2 MFT, 2 EFT,  
STIM, WD, STIM, WD, STIM, WD,  
SCI, SPI, I²C 2 SCI, SPI, I²C SCI, SPI, I²C  
2 MFT, 2 EFT, 2 MFT, 2 EFT, 2 MFT, 2 EFT,  
STIM, WD,  
STIM, WD,  
STIM, WD, 2 SCI,  
1)  
2 SCI, SPI, I²C 2 SCI, SPI, I²C  
SPI, 2 I²C  
ADC  
Network Inter-  
face  
16 x 10 bits  
16 x 10 bits  
LIN Master  
P/LQFP100  
16 x 10 bits  
16 x 10 bits  
CAN, LIN Master  
P/LQFP100  
16 x 10 bits  
2 CAN,J1850,  
LIN Master  
16 x 10 bits  
-
CAN  
CAN, LIN Master  
Packages  
LQFP64  
LQFP64  
P/LQFP100  
1) see Section 12.4 on page 407 for important information  
2) see Table 71 on page 404 for the list of supported part numbers  
Rev. 5  
1/429  
November 2006  
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