Datasheet > LPC1111JHN33

LPC1111JHN33

更新时间： 2024-09-20 14:59:19

品牌	Logo	应用领域
恩智浦 - NXP		微控制器
页数	文件大小	规格书
39页	279K
描述
Scalable Entry Level 32-bit Microcontroller (MCU) based on ARM Cortex-M0+/M0 Cores

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LPC1111JHN33 数据手册

LPC1102

32-bit ARM Cortex-M0 microcontroller; 32 kB flash and 8 kB

SRAM

Rev. 3 — 18 April 2011

Product data sheet

1. General description

The LPC1102 is an ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit

microcontroller applications, offering performance, low power, simple instruction set and

memory addressing together with reduced code size compared to existing 8/16-bit

architectures.

The LPC1102 operates at CPU frequencies of up to 50 MHz.

The peripheral complement of the LPC1102 includes 32 kB of flash memory, 8 kB of data

memory, one RS-485/EIA-485 UART, one SPI interface with SSP features, four general

purpose counter/timers, a 10-bit ADC, and 11 general purpose I/O pins.

2. Features and benefits

System:

ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.

ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).

Serial Wire Debug.

System tick timer.

Memory:

32 kB on-chip flash programming memory.

8 kB SRAM.

In-Application Programming (IAP) and In-System Programming (ISP) support via

on-chip bootloader software.

Digital peripherals:

11 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors.

GPIO pins can be used as edge and level sensitive interrupt sources.

Four general purpose counter/timers with a total of one capture input and nine

match outputs.

Programmable WatchDog Timer (WDT).

Analog peripherals:

10-bit ADC with input multiplexing among five pins.

12 3 4 5 6 7...39

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