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LMZ22005 PDF预览

LMZ22005

更新时间: 2024-09-14 11:37:47
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美国国家半导体 - NSC /
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10页 2711K
描述
Evaluation Board to be an easy-to-use platform to evaluate

LMZ22005 数据手册

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National Semiconductor  
Application Note 2085  
Alan Martin  
LMZ23605/03, LMZ22005/03  
Evaluation Board  
March 27, 2011  
Introduction  
Board Specifications  
The LMZ23605/03, LMZ22005/03 evaluation boards are de-  
signed to be an easy-to-use platform to evaluate the full  
capabilities of this family of SIMPLE SWITCHER® power  
modules. The PCB construction has excellent thermal per-  
formance and includes extra locations for optional compo-  
nents that may not be required in the end application.  
VIN = 6V to 36V (LMZ22005/03 limited to 20V)  
Enable UVLO = 5.7V  
VOUT = 3.3V  
IOUT = 0 to 5A (LMZ23603 and LMZ22003 limited to 3A)  
θ
JA = 12°C / W, θJC = 1.9°C/W  
PCB designed on four layers; Inner are 2 oz; Outer are 3  
oz.  
The LMZ23605/03 can accept an input voltage rail between  
6V and 36V and the LMZ22005/03 can accept an input volt-  
age rail between 6V and 20V. The devices can deliver an  
adjustable and highly accurate output voltage as low as 0.8V  
and as high as 6V. The control architecture is constant fre-  
quency PWM with emulated current mode sensing. The con-  
trol loop operates well with low ESR output capacitors such  
as ceramics or specialty polymer. The precision enable input  
allows for programmable UVLO on the input supply or flexi-  
bility in sequencing. The external soft-start capacitor facili-  
tates controlled output rise time at startup. The module family  
is a reliable and robust solution with cycle-by-cycle valley cur-  
rent limit to protect for over current or short-circuit faults.  
Additionally there is thermal shutdown protection, and they  
will start up into a pre-biased output. The free-running switch-  
ing frequency is 812 kHz (typ) and a 650 kHz to 950 kHz  
synchronization range is supported.  
Measures 3.5 in. x 3.5 in. (8.9 cm x 8.9 cm) and is 62mil  
(.062”) thick of FR4 laminate material  
Max ambient temp of 70°C at full 5A load (12 Vin)  
For additional circuit considerations refer to the Applications  
Section of the LMZ23605/03 or LMZ22005/03 data sheets.  
For negative output voltage connections follow the method  
shown in AN-2027.  
30131601  
FIGURE 1. Evaluation Board Simplified Schematic  
© 2011 National Semiconductor Corporation  
301316  
www.national.com  

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