Datasheet > LMUN5230T3G

LMUN5230T3G

更新时间： 2024-11-06 02:45:51

品牌	Logo	应用领域
雷卯电子 - LEIDITECH		晶体管
页数	文件大小	规格书
10页	772K
描述
Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network

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LMUN5230T3G 数据手册

Series

LMUN5211T1G

Bias Resistor Transistor

NPN Silicon Surface Mount Transistor

with Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The BRT (Bias Resistor

Transistor) contains a single transistor with a monolithic bias network con-

sisting of two resistors; a series base resistor and a base–emitter resistor.

The BRT eliminates these individual components by integrating them into a

single device. The use of a BRT can reduce both system cost and board

space. The device is housed in the SC–70/SOT–323 package which is

designed for low power surface mount applications.

• Simplifies Circuit Design

SC-70 / SOT-323

PIN 3

COLLECTOR

(OUTPUT)

R₁

R₂

PIN 1

BASE

(INPUT)

PIN 2

EMITTER

(GROUND)

• Reduces Board Space

• Reduces Component Count

• The SC–70/SOT–323 package can be soldered using wave or

reflow. The modified gull–winged leads absorb thermal stress

during soldering eliminating the possibility of damage to the die.

• Available in 8 mm embossed tape and reel

MARKINGDIAGRAM

Use the Device Number to order the 7 inch/3000 unit reel.

• Pb-Free package is available

DEVICE MARKING INFORMATION

See specific marking information in the device marking table on page 2

of this data sheet.

8x = Specific Device Code

x = (See Marking Table)

M= Date Code

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

Symbol

V_CBO

V_CEO

I_C

Value

Unit

Vdc

Rating

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Vdc

100

mAdc

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

Unit

Total Device Dissipation

P_D

202 (Note 1.)

310 (Note 2.)

1.6 (Note 1.)

2.5 (Note 2.)

T = 25°C

Derate above 25°C

mW/°C

°C/W

°C

Thermal Resistance –

Junction-to-Ambient

R_θJA

R_θJL

618 (Note 1.)

403 (Note 2.)

Thermal Resistance –

Junction-to-Lead

280 (Note 1.)

332 (Note 2.)

Junction and Storage

Temperature Range

T_J,T_stg

–55 to +150

1. FR–4 @ Minimum Pad

2. FR–4 @ 1.0 x 1.0 inch Pad

1/10

Rev :01.06.2018

www.leiditech.com

12 3 4 5 6 7...10

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与LMUN5230T3G相关器件

型号	品牌	获取价格	描述	数据表
LMUN5231DW1T1	LRC	获取价格	Dual Bias ResistorTransistors NPN Silicon Surface Mount Transistors with Monolithic Bias R
LMUN5231DW1T1G	LRC	获取价格	Dual Bias ResistorTransistors NPN Silicon Surface Mount Transistors with Monolithic Bias R
LMUN5231DW1T1G_15	LRC	获取价格	Dual Bias ResistorTransistors
LMUN5231T1	LRC	获取价格	Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resisto
LMUN5231T1G	LRC	获取价格	Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resisto
LMUN5231T1G	LEIDITECH	获取价格	Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resisto
LMUN5231T3G	LEIDITECH	获取价格	Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resisto
LMUN5232DW1T1	LRC	获取价格	Dual Bias ResistorTransistors NPN Silicon Surface Mount Transistors with Monolithic Bias R
LMUN5232DW1T1G	LRC	获取价格	Dual Bias ResistorTransistors NPN Silicon Surface Mount Transistors with Monolithic Bias R
LMUN5232DW1T1G_15	LRC	获取价格	Dual Bias ResistorTransistors

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