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LMUN5231T1G PDF预览

LMUN5231T1G

更新时间: 2024-02-24 23:30:24
品牌 Logo 应用领域
雷卯电子 - LEIDITECH 晶体管
页数 文件大小 规格书
10页 925K
描述
Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network

LMUN5231T1G 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknown风险等级:5.8
最大集电极电流 (IC):0.1 A最小直流电流增益 (hFE):8
元件数量:1极性/信道类型:NPN
最大功率耗散 (Abs):0.31 W子类别:BIP General Purpose Small Signal
表面贴装:YES晶体管元件材料:SILICON
Base Number Matches:1

LMUN5231T1G 数据手册

 浏览型号LMUN5231T1G的Datasheet PDF文件第2页浏览型号LMUN5231T1G的Datasheet PDF文件第3页浏览型号LMUN5231T1G的Datasheet PDF文件第4页浏览型号LMUN5231T1G的Datasheet PDF文件第5页浏览型号LMUN5231T1G的Datasheet PDF文件第6页浏览型号LMUN5231T1G的Datasheet PDF文件第7页 
LMUN5211T1GSeries  
S-LMUN5211T1G  
Series  
Bias Resistor Transistor  
3
NPN Silicon Surface Mount Transistor  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The BRT (Bias Resistor  
Transistor) contains a single transistor with a monolithic bias network con-  
sisting of two resistors; a series base resistor and a base–emitter resistor.  
The BRT eliminates these individual components by integrating them into a  
single device. The use of a BRT can reduce both system cost and board  
space. The device is housed in the SC–70/SOT–323 package which is  
designed for low power surface mount applications.  
1
2
SC-70 / SOT-323  
PIN 3  
COLLECTOR  
(OUTPUT)  
R1  
R2  
PIN 1  
BASE  
(INPUT)  
PIN 2  
EMITTER  
(GROUND)  
• Simplifies Circuit Design  
MARKINGDIAGRAM  
• Reduces Board Space  
• Reduces Component Count  
• The SC–70/SOT–323 package can be soldered using wave or  
reflow. The modified gull–winged leads absorb thermal stress  
during soldering eliminating the possibility of damage to the die.  
• Available in 8 mm embossed tape and reel  
8X  
M
8x = Specific Device Code  
x = (See Marking Table)  
M= Date Code  
Use the Device Number to order the 7 inch/3000 unit reel.  
• Pb-Free package is available  
•S- Prefix for Automotive and Other Applications Requiring Unique Site  
and Control Change Requirements; AEC-Q101 Qualified and PPAP Capable.  
DEVICE MARKING INFORMATION  
See specific marking information in the device marking table on page 2  
of this data sheet.  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
Symbol  
VCBO  
VCEO  
IC  
Value  
Unit  
Vdc  
Rating  
Collector-Base Voltage  
50  
Collector-Emitter Voltage  
Collector Current  
50  
Vdc  
100  
mAdc  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
Total Device Dissipation  
PD  
202 (Note 1.)  
310 (Note 2.)  
1.6 (Note 1.)  
2.5 (Note 2.)  
mW  
T = 25°C  
A
Derate above 25°C  
mW/°C  
°C/W  
°C/W  
°C  
Thermal Resistance –  
Junction-to-Ambient  
RθJA  
RθJL  
618 (Note 1.)  
403 (Note 2.)  
Thermal Resistance –  
Junction-to-Lead  
280 (Note 1.)  
332 (Note 2.)  
Junction and Storage  
Temperature Range  
TJ, Tstg  
–55 to +150  
1. FR–4 @ Minimum Pad  
2. FR–4 @ 1.0 x 1.0 inch Pad  
1/10  
Rev :01.06.2017  
www.leiditech.com  

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