Datasheet > LMK00306

LMK00306

更新时间： 2024-10-26 11:46:03

品牌	Logo	应用领域
德州仪器 - TI		转换器电平转换器时钟
页数	文件大小	规格书
25页	1458K
描述
3-GHz 6-Output Differential Clock Buffer/Level Translator

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

LMK00306 数据手册

March 14, 2012

LMK00306

3-GHz 6-Output Differential Clock Buffer/Level Translator

Servers, Workstations, and Computing

■

1.0 General Description

The LMK00306 is a 3-GHz, 6-output differential fanout buffer

3.0 Features

intended for high-frequency, low-jitter clock/data distribution

3:1 Input Multiplexer

■

and level translation. The input clock can be selected from

two universal inputs or one crystal input. The selected input

clock is distributed to two banks of 3 differential outputs and

one LVCMOS output. Both differential output banks can be

independently configured as LVPECL, LVDS, or HCSL

drivers, or disabled. The LVCMOS output has a synchronous

enable input for runt-pulse-free operation when enabled or

disabled. The LMK00306 operates from a 3.3 V core supply

and 3 independent 3.3 V/2.5 V output supplies.

Two universal inputs operate up to 3.1 GHz and accept

LVPECL, LVDS, CML, SSTL, HSTL, HCSL (AC-

coupled), or single-ended clocks

—

One crystal input accepts a 10 to 40 MHz crystal or

single-ended clock

—

Two Banks with 3 Differential Outputs each

■

LVPECL, LVDS, HCSL, or Hi-Z (selectable per bank)

—

LVPECL Additive Jitter with LMK03806 clock source:

The LMK00306 provides high performance, versatility, and

power efficiency, making it ideal for replacing fixed-output

buffer devices while increasing timing margin in the system.

20 fs RMS at 156.25 MHz (10 kHz – 1 MHz)

51 fs RMS at 156.25 MHz (12 kHz – 20 MHz)

■

High PSRR: -65 / -76 dBc (LVPECL/LVDS) at 156.25 MHz

LVCMOS output with synchronous enable input

Pin-controlled configuration

■

2.0 Target Applications

Clock Distribution and Level Translation for high-speed

■

V_CCCore Supply: 3.3 V ± 5%

ADCs, DACs, Serial Interfaces (Multi-Gigabit Ethernet,

XAUI, Fibre Channel, PCIe, SATA/SAS, SONET/SDH,

CPRI), and high-frequency backplanes

3 Independent V_CCOOutput Supplies: 3.3 V/2.5 V ± 5%

Industrial temperature range: -40°C to +85°C

Package: 36-pin LLP (6.0 x 6.0 x 0.8 mm)

Remote Radio Units (RRU) and Baseband Units (BBU)

■

Switches and Routers

4.0 Functional Block Diagram

30177401

301774 SNAS578A

www.ti.com

12 3 4 5 6 7...25

中文翻译

下载PDF

与LMK00306相关器件

型号	品牌	获取价格	描述	数据表
LMK00306SQ	TI	获取价格	3-GHz 6-Output Differential Clock Buffer/Level Translator
LMK00306SQ/NOPB	TI	获取价格	具有 6 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| NJK \| 36
LMK00306SQE	TI	获取价格	3-GHz 6-Output Differential Clock Buffer/Level Translator
LMK00306SQE/NOPB	TI	获取价格	具有 6 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| NJK \| 36
LMK00306SQX	TI	获取价格	3-GHz 6-Output Differential Clock Buffer/Level Translator
LMK00306SQX/NOPB	TI	获取价格	具有 6 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| NJK \| 36
LMK00308	TI	获取价格	3-GHz 8-Output Differential Clock Buffer/Level Translator
LMK00308SQ	TI	获取价格	3-GHz 8-Output Differential Clock Buffer/Level Translator
LMK00308SQ/NOPB	TI	获取价格	具有 8 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| RTA \| 40
LMK00308SQE	TI	获取价格	3-GHz 8-Output Differential Clock Buffer/Level Translator

与LMK00306相关文章

三星深化印度制造布局，供应链本地化进程加速
2024-10-29

5
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

4
纳微科技震撼发布GaNSlim革新氮化镓功率芯片
2024-10-18

35
意法半导体发布第四代SiC技术，助力电动汽车电驱
2024-10-15

43

产品中心

服务支持

精选活动

关于我们

帮助中心

LMK00306

LMK00306 数据手册

与LMK00306相关器件

与LMK00306相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

LMK00306

LMK00306 数据手册

与LMK00306相关器件

与LMK00306相关文章

您还可以找

您在本页遇到什么问题？