Datasheet > LMK00308

LMK00308

更新时间： 2024-11-20 11:46:03

品牌	Logo	应用领域
德州仪器 - TI		转换器电平转换器时钟
页数	文件大小	规格书
25页	1459K
描述
3-GHz 8-Output Differential Clock Buffer/Level Translator

阅读下载

中文翻译

获取价格

数据手册
替代型号

如果您发现信息不准确，欢迎纠错

LMK00308 数据手册

March 14, 2012

LMK00308

3-GHz 8-Output Differential Clock Buffer/Level Translator

Servers, Workstations, and Computing

■

1.0 General Description

The LMK00308 is a 3-GHz, 8-output differential fanout buffer

3.0 Features

intended for high-frequency, low-jitter clock/data distribution

3:1 Input Multiplexer

■

and level translation. The input clock can be selected from

two universal inputs or one crystal input. The selected input

clock is distributed to two banks of 4 differential outputs and

one LVCMOS output. Both differential output banks can be

independently configured as LVPECL, LVDS, or HCSL

drivers, or disabled. The LVCMOS output has a synchronous

enable input for runt-pulse-free operation when enabled or

disabled. The LMK00308 operates from a 3.3 V core supply

and 3 independent 3.3 V/2.5 V output supplies..

Two universal inputs operate up to 3.1 GHz and accept

LVPECL, LVDS, CML, SSTL, HSTL, HCSL (AC-

coupled), or single-ended clocks

—

One crystal input accepts a 10 to 40 MHz crystal or

single-ended clock

—

Two Banks with 4 Differential Outputs each

■

LVPECL, LVDS, HCSL, or Hi-Z (selectable per bank)

—

LVPECL Additive Jitter with LMK03806 clock source

The LMK00308 provides high performance, versatility, and

power efficiency, making it ideal for replacing fixed-output

buffer devices while increasing timing margin in the system.

20 fs RMS at 156.25 MHz (10 kHz – 1 MHz)

51 fs RMS at 156.25 MHz (12 kHz – 20 MHz)

■

High PSRR: -65 / -76 dBc (LVPECL/LVDS) at 156.25 MHz

LVCMOS output with synchronous enable input

Pin-controlled configuration

■

2.0 Target Applications

Clock Distribution and Level Translation for high-speed

■

V_CCCore Supply: 3.3 V ± 5%

ADCs, DACs, Serial Interfaces (Multi-Gigabit Ethernet,

XAUI, Fibre Channel, PCIe, SATA/SAS, SONET/SDH,

CPRI), and high-frequency backplanes

3 Independent V_CCOOutput Supplies: 3.3 V/2.5 V ± 5%

Industrial temperature range: -40°C to +85°C

Package: 40-pin LLP (6.0 x 6.0 x 0.8 mm)

Remote Radio Units (RRU) and Baseband Units (BBU)

■

Switches and Routers

4.0 Functional Block Diagram

30177601

301776 SNAS576A

www.ti.com

12 3 4 5 6 7...25

中文翻译

下载PDF

LMK00308 替代型号

型号	品牌	替代类型	描述	数据表
CDCLVP1208	TI	功能相似	Eight LVPECL Output, High-Performance Clock 2:8 Buffer
CDCLVD1208	TI	功能相似	2:8 Low Additive Jitter LVDS Buffer

与LMK00308相关器件

型号	品牌	获取价格	描述	数据表
LMK00308SQ	TI	获取价格	3-GHz 8-Output Differential Clock Buffer/Level Translator
LMK00308SQ/NOPB	TI	获取价格	具有 8 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| RTA \| 40
LMK00308SQE	TI	获取价格	3-GHz 8-Output Differential Clock Buffer/Level Translator
LMK00308SQE/NOPB	TI	获取价格	具有 8 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| RTA \| 40
LMK00308SQX	TI	获取价格	3-GHz 8-Output Differential Clock Buffer/Level Translator
LMK00308SQX/NOPB	TI	获取价格	具有 8 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| RTA \| 40
LMK00334	TI	获取价格	LMK00334 4-Output PCIe/Gen1/Gen2/Gen3 Clock Buffer/Level Translator
LMK00334_14	TI	获取价格	Four-Output PCIe/Gen1/Gen2/Gen3 Clock Buffer/Level Translator
LMK00334-Q1	TI	获取价格	汽车类 4 路输出 PCIe® 第 1 代/第 2 代/第 3 代/第 4 代/第
LMK00334RTVR	TI	获取价格	LMK00334 4-Output PCIe/Gen1/Gen2/Gen3 Clock Buffer/Level Translator

与LMK00308相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

24
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

16
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

48
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

46

产品中心

服务支持

精选活动

关于我们

帮助中心

LMK00308

LMK00308 数据手册

LMK00308 替代型号

与LMK00308相关器件

与LMK00308相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

LMK00308

LMK00308 数据手册

LMK00308 替代型号

与LMK00308相关器件

与LMK00308相关文章

您还可以找

您在本页遇到什么问题？