LMK00725
www.ti.com
SNAS625A –SEPTEMBER 2013–REVISED OCTOBER 2013
Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer
Check for Samples: LMK00725
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FEATURES
APPLICATIONS
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Five 3.3V Differential LVPECL Outputs
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Wireless and Wired Infrastructure
Networking and Data Communications
Servers and Computing
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Additive Jitter: 43 fs RMS (typ) @ 312.5
MHz
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Noise Floor (≥1 MHz offset): -158 dBc/Hz
Medical Imaging
(typ) @ 312.5 MHz
Portable Test and Measurement
High-End A/V
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Output Frequency: 650 MHz (max)
Output Skew: 35 ps (max)
Part-to-Part Skew: 100 ps (max)
Propagation Delay: 0.37 ns (max)
DESCRIPTION
The LMK00725 is a low skew, high-performance
clock fanout buffer which can distribute up to five
3.3V LVPECL outputs from one of two inputs, which
can accept differential or single-ended inputs. The
clock enable input is synchronized internally to
eliminate runt or glitch pulses on the outputs when
the clock enable pin is asserted or de-asserted. The
low additive jitter and phase noise floor and ensured
output and part-to-part skew characteristics make the
LMK00725 ideal for applications demanding high
performance and repeatability.
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Two Differential Input Pairs (pin-selectable)
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CLKx, nCLK Input Pairs can accept
LVPECL, LVDS, HCSL, SSTL, LVHSTL, or
Single-Ended Signals
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Synchronous Clock Enable
Power Supply: 3.3V ± 5%
Package: 20-Lead TSSOP
Industrial Temperature Range: -40ºC to +85ºC
FUNCTIONAL BLOCK DIAGRAM
RPU
CLK_EN
D
Q
RPD
RPU
RPD
RPU
CLK0
0
1
nCLK0
Q0
CLK1
nQ0
Q1
nCLK1
nQ1
Q2
RPD
CLK_SEL
nQ2
Q3
RPU = Pullup
RPD = Pulldown
nQ3
Q4
nQ4
(1) RPU = 51 kΩ pullup, RPD = 51 kΩ pulldown
Figure 1.
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated