Datasheet > LMK00304

LMK00304

更新时间： 2024-10-26 11:46:03

品牌	Logo	应用领域
德州仪器 - TI		转换器电平转换器时钟
页数	文件大小	规格书
25页	1453K
描述
3-GHz 4-Output Differential Clock Buffer/Level Translator

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LMK00304 数据手册

March 12, 2012

LMK00304

3-GHz 4-Output Differential Clock Buffer/Level Translator

Servers, Workstations, and Computing

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1.0 General Description

The LMK00304 is a 3-GHz 4-output differential fanout buffer

3.0 Features

intended for high-frequency, low-jitter clock/data distribution

3:1 Input Multiplexer

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and level translation. The input clock can be selected from

two universal inputs or one crystal input. The selected input

clock is distributed to two banks of 2 differential outputs and

one LVCMOS output. The differential output banks can be

mutually configured as LVPECL, LVDS, or HCSL drivers, or

disabled. The LVCMOS output has a synchronous enable in-

put for runt-pulse-free operation when enabled or disabled.

The LMK00304 operates from a 3.3 V core supply and 3 in-

dependent 3.3 V/2.5 V output supplies.

Two universal inputs operate up to 3.1 GHz and accept

LVPECL, LVDS, CML, SSTL, HSTL, HCSL (AC-

coupled), or single-ended clocks

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One crystal input accepts a 10 to 40 MHz crystal or

single-ended clock

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Two Banks with 2 Differential Outputs each

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LVPECL, LVDS, HCSL, or Hi-Z (selectable)

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LVPECL Additive Jitter with LMK03806 clock source:

The LMK00304 provides high performance, versatility, and

power efficiency, making it ideal for replacing fixed-output

buffer devices while increasing timing margin in the system.

20 fs RMS at 156.25 MHz (10 kHz – 1 MHz)

51 fs RMS at 156.25 MHz (12 kHz – 20 MHz)

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High PSRR: -65 / -76 dBc (LVPECL/LVDS) at 156.25 MHz

LVCMOS output with synchronous enable input

Pin-controlled configuration

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2.0 Target Applications

Clock Distribution and Level Translation for high-speed

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V_CCCore Supply: 3.3 V ± 5%

ADCs, DACs, Serial Interfaces (Multi-Gigabit Ethernet,

XAUI, Fibre Channel, PCIe, SATA/SAS, SONET/SDH,

CPRI), and high-frequency backplanes

3 Independent V_CCOOutput Supplies: 3.3 V/2.5 V ± 5%

Industrial temperature range: -40°C to +85°C

Package: 32-pin LLP (5.0 x 5.0 x 0.8 mm)

Remote Radio Units (RRU) and Baseband Units (BBU)

■

Switches and Routers

4.0 Functional Block Diagram

30177301

301773 SNAS577B

www.ti.com

12 3 4 5 6 7...25

中文翻译

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与LMK00304相关器件

型号	品牌	获取价格	描述	数据表
LMK00304SQ	TI	获取价格	3-GHz 4-Output Differential Clock Buffer/Level Translator
LMK00304SQ/NOPB	TI	获取价格	具有 4 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| RTV \| 32
LMK00304SQE	TI	获取价格	3-GHz 4-Output Differential Clock Buffer/Level Translator
LMK00304SQE/NOPB	TI	获取价格	具有 4 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| RTV \| 32
LMK00304SQX	TI	获取价格	3-GHz 4-Output Differential Clock Buffer/Level Translator
LMK00304SQX/NOPB	TI	获取价格	具有 4 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| RTV \| 32
LMK00306	TI	获取价格	3-GHz 6-Output Differential Clock Buffer/Level Translator
LMK00306SQ	TI	获取价格	3-GHz 6-Output Differential Clock Buffer/Level Translator
LMK00306SQ/NOPB	TI	获取价格	具有 6 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 \| NJK \| 36
LMK00306SQE	TI	获取价格	3-GHz 6-Output Differential Clock Buffer/Level Translator

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