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LMK00301ARHSR PDF预览

LMK00301ARHSR

更新时间: 2024-11-21 11:07:55
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动逻辑集成电路时钟驱动器转换器电平转换器
页数 文件大小 规格书
35页 2346K
描述
3-GHz 10 路输出差动扇出缓冲器/电平转换器 | RHS | 48 | -40 to 85

LMK00301ARHSR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:WQFN-48
Reach Compliance Code:compliantFactory Lead Time:6 weeks
风险等级:1.66系列:LMK
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-PQCC-N48
JESD-609代码:e3长度:7 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:3
功能数量:1反相输出次数:
端子数量:48实输出次数:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE传播延迟(tpd):0.885 ns
Same Edge Skew-Max(tskwd):0.05 ns座面最大高度:0.8 mm
最大供电电压 (Vsup):3.45 V最小供电电压 (Vsup):3.15 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:7 mm
最小 fmax:3100 MHzBase Number Matches:1

LMK00301ARHSR 数据手册

 浏览型号LMK00301ARHSR的Datasheet PDF文件第2页浏览型号LMK00301ARHSR的Datasheet PDF文件第3页浏览型号LMK00301ARHSR的Datasheet PDF文件第4页浏览型号LMK00301ARHSR的Datasheet PDF文件第5页浏览型号LMK00301ARHSR的Datasheet PDF文件第6页浏览型号LMK00301ARHSR的Datasheet PDF文件第7页 
LMK00301  
www.ti.com  
SNAS512G SEPTEMBER 2011REVISED MAY 2013  
LMK00301 3-GHz 10-Output Differential Clock Buffer/Level Translator  
Check for Samples: LMK00301  
1
FEATURES  
TARGET APPLICATIONS  
2
3:1 Input Multiplexer  
Clock Distribution and Level Translation for  
ADCs, DACs, Multi-Gigabit Ethernet, XAUI,  
Fibre Channel, SATA/SAS, SONET/SDH, CPRI,  
High-Frequency Backplanes  
Two Universal Inputs Operate up to 3.1 GHz  
and Accept LVPECL, LVDS, CML, SSTL,  
HSTL, HCSL, or Single-Ended Clocks  
Switches, Routers, Line Cards, Timing Cards  
Servers, Computing, PCI Express (PCIe 3.0)  
Remote Radio Units and Baseband Units  
One Crystal Input Accepts 10 to 40 MHz  
Crystal or Single-Ended Clock  
Two Banks with 5 Differential Outputs Each  
LVPECL, LVDS, HCSL, or Hi-Z (Selectable  
Per Bank)  
DESCRIPTION  
The LMK00301 is a 3-GHz, 10-output differential  
fanout buffer intended for high-frequency, low-jitter  
clock/data distribution and level translation. The input  
clock can be selected from two universal inputs or  
one crystal input. The selected input clock is  
distributed to two banks of 5 differential outputs and  
one LVCMOS output. Both differential output banks  
can be independently configured as LVPECL, LVDS,  
or HCSL drivers, or disabled. The LVCMOS output  
has a synchronous enable input for runt-pulse-free  
operation when enabled or disabled. The LMK00301  
operates from a 3.3 V core supply and 3 independent  
3.3 V/2.5 V output supplies.  
LVPECL Additive Jitter with LMK03806  
Clock Source at 156.25 MHz:  
20 fs RMS (10 kHz – 1 MHz)  
51 fs RMS (12 kHz – 20 MHz)  
High PSRR: -65 / -76 dBc (LVPECL/LVDS) at  
156.25 MHz  
LVCMOS Output with Synchronous Enable  
Input  
Pin-Controlled Configuration  
VCC Core Supply: 3.3 V ± 5%  
3 Independent VCCO Output Supplies: 3.3 V/2.5  
V ± 5%  
The LMK00301 provides high performance,  
versatility, and power efficiency, making it ideal for  
replacing fixed-output buffer devices while increasing  
timing margin in the system.  
Industrial Temperature Range: -40°C to +85°C  
48-lead WQFN (7 mm x 7 mm)  
Functional Block Diagram  
V
CC  
V
V
V
CCOB  
CCOA  
CCOC  
2
2
V
CCOA  
CLKoutA_TYPE[1:0]  
CLKin_SEL[1:0]  
CLKoutA0  
CLKoutA0*  
Bank A  
5 Output Pairs  
(LVPECL, LVDS,  
HCSL, or Hi-Z)  
CLKin0  
CLKoutA4  
CLKoutA4*  
Universal Inputs  
CLKin0*  
(Differential/  
CLKin1  
Single-Ended)  
V
3:1  
CCOB  
MUX  
CLKin1*  
CLKoutB0  
CLKoutB0*  
OSCin  
Crystal  
Bank B  
OSCout  
5 Output Pairs  
(LVPECL, LVDS,  
HCSL, or Hi-Z)  
2
CLKoutB_TYPE[1:0]  
REFout_EN  
CLKoutB4  
CLKoutB4*  
V
CCOC  
REFout (LVCMOS)  
SYNC  
GND  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2011–2013, Texas Instruments Incorporated  
 

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具有 4 个可配置输出的 3.1GHz 差动时钟缓冲器/电平转换器 | RTV | 32