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LMK00105SQ PDF预览

LMK00105SQ

更新时间: 2024-11-02 11:46:03
品牌 Logo 应用领域
德州仪器 - TI 转换器电平转换器
页数 文件大小 规格书
15页 1526K
描述
Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator

LMK00105SQ 技术参数

生命周期:Obsolete零件包装代码:QFN
包装说明:4 X 4 MM, 0.80 MM HEIGHT, WQFN-24针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.4系列:00105
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-XQCC-N24
长度:4 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:1反相输出次数:
端子数量:24实输出次数:5
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Same Edge Skew-Max(tskwd):0.025 ns座面最大高度:0.8 mm
最大供电电压 (Vsup):3.45 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
宽度:4 mm最小 fmax:200 MHz
Base Number Matches:1

LMK00105SQ 数据手册

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March 6, 2012  
LMK00105  
Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator  
with Universal Input  
1.0 General Description  
3.0 Features  
The LMK00105 is a high performance, low noise LVCMOS  
fanout buffer which can distribute 5 ultra-low jitter clocks from  
a differential, single ended, or crystal input. The LMK00105  
supports synchronous output enable for glitch free operation.  
The ultra low-skew, low-jitter, and high PSRR make this buffer  
ideally suited for various networking, telecom, server and  
storage area networking, RRU LO reference distribution,  
medical and test equipment applications.  
5 LVCMOS Outputs, DC to 200 MHz  
Universal Input  
LVPECL  
LVDS  
HCSL  
SSTL  
LVCMOS / LVTTL  
The core voltage can be set to 2.5 or 3.3 V, while the output  
voltage can be set to 1.5, 1.8, 2.5 or 3.3 V. The LMK00105  
can be easily configured through pin programming.  
Crystal Oscillator Interface  
Crystal Input Frequency: 10 to 40 MHz  
Output Skew: 6 ps  
Additive Phase Jitter  
2.0 Target Applications  
30 fs at 156.25 MHz (12 kHz to 20 MHz)  
LO Reference Distribution for RRU Applications  
Low Propagation Delay  
SONET, Ethernet, Fibre Channel Line Cards  
Operates with 3.3 or 2.5 V Core Supply Voltage  
Adjustable Output Power Supply  
Optical Transport Networks  
GPON OLT/ONU  
1.5 V, 1.8 V, 2.5 V, and 3.3 V For Each Bank  
Server and Storage Area Networking  
24 pin LLP package (4.0 x 4.0 x 0.8 mm)  
Medical Imaging  
Portable Test and Measurement  
High-end A/V  
4.0 Functional Block Diagram  
30180701  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2012 Texas Instruments Incorporated  
301807 SNAS579  
www.ti.com  

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