Datasheet > KMM464S1724BT1-GL

KMM464S1724BT1-GL

更新时间： 2023-01-15 00:00:00

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器
页数	文件大小	规格书
10页	157K
描述
Synchronous DRAM Module, 16MX64, 6ns, CMOS

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KMM464S1724BT1-GL 数据手册

KMM464S1724BT1

PC100 SODIMM

Revision History

Revision 0.0 (June 7, 1999)

• Changed tRDL from 1CLK to 2CLK in OPERATING AC PARAMETER.

• Skip ICC4 value of CL=2 in DC characteristics in datasheet.

• Define a new parameter of tDAL( 2CLK +20ns), Last data in to Active delay in OPERATING AC PARAMETER.

• Eliminated FREQUENCY vs.PARAMETER RELATIONSHIP TABLE.

• Symbol Change Notice

Before

After

Input leakage current (inputs)

Input leakage current

Input leakage current (I/O pins)

Output open @ DC characteristic table

• Test Condition in DC CHARACTERISTIC Change Notice

Symbol

Before

CKE £ VIL(max), tCC = 15ns

CKE ³ VIH(min), CS ³ VIH(min), tCC = 15ns

After

CKE £ VIL(max), tCC = 10ns

CC2P , CC3P

CKE ³ VIH(min), CS ³ VIH(min), tCC = 10ns

CC2N , CC3N

Input signals are changed one time during 30ns

Input signals are changed one time during 20ns

2 Banks activated

4 Banks activated

CC4

Revision 0.1 (July 5, 1999)

• Added Notes @OPERATING AC PARAMETER

Notes : 5. For -H/L, tRDL=1CLK and tDAL=1CLK+20ns is also supported .

SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + 20ns.

Rev. 0.1 July 1999

12 3 4 5 6 7...10

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