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KM48V2100CT-L5 PDF预览

KM48V2100CT-L5

更新时间： 2024-11-02 19:42:47
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器
页数 文件大小 规格书
20页 341K
描述
DRAM

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中文翻译

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KM48V2100CT-L5 技术参数

生命周期：Obsolete包装说明：,
Reach Compliance Code：unknown风险等级：5.84
Base Number Matches：1

KM48V2100CT-L5 数据手册

 浏览型号KM48V2100CT-L5的Datasheet PDF文件第2页浏览型号KM48V2100CT-L5的Datasheet PDF文件第3页浏览型号KM48V2100CT-L5的Datasheet PDF文件第4页浏览型号KM48V2100CT-L5的Datasheet PDF文件第5页浏览型号KM48V2100CT-L5的Datasheet PDF文件第6页浏览型号KM48V2100CT-L5的Datasheet PDF文件第7页 
KM48C2000C, KM48C2100C  
KM48V2000C, KM48V2100C  
CMOS DRAM  
2M x 8Bit CMOS Dynamic RAM with Fast Page Mode  
DESCRIPTION  
This is a family of 2,097,152 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells  
within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-5 or -6), power consump-  
tion(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-  
RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version.  
This 2Mx8 Fast Page Mode DRAM family is fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power  
consumption and high reliability.  
It may be used as graphic memory unit for microcomputer, personal computer and portable machines.  
FEATURES  
• Part Identification  
• Fast Page Mode operation  
• CAS-before-RAS refresh capability  
• RAS-only and Hidden refresh capability  
- KM48C2000C/C-L (5V, 4K Ref.)  
• Self-refresh capability (L-ver only)  
- KM48C2100C/C-L (5V, 2K Ref.)  
• Fast parallel test mode capability  
- KM48V2000C/C-L (3.3V, 4K Ref.)  
- KM48V2100C/C-L (3.3V, 2K Ref.)  
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs  
• Early Write or output enable controlled write  
• JEDEC Standard pinout  
• Active Power Dissipation  
Unit : mW  
5V  
• Available in Plastic SOJ and TSOP(II) packages  
• Single +5V±10% power supply (5V product)  
• Single +3.3V±0.3V power supply (3.3V product)  
3.3V  
Speed  
4K  
2K  
4K  
495  
440  
2K  
-5  
-6  
324  
288  
396  
360  
605  
550  
FUNCTIONAL BLOCK DIAGRAM  
• Refresh Cycles  
Part  
VCC  
Refresh  
cycle  
Refresh period  
RAS  
CAS  
W
Vcc  
Vss  
Control  
Clocks  
NO.  
Normal  
L-ver  
VBB Generator  
C2000C  
V2000C  
C2100C  
V2100C  
5V  
3.3V  
5V  
4K  
2K  
64ms  
Data in  
128ms  
Buffer  
Row Decoder  
Refresh Timer  
Refresh Control  
Refresh Counter  
32ms  
3.3V  
DQ0  
to  
DQ7  
Memory Array  
2,097,152 x 8  
Cells  
• Performance Range  
A0-A11  
(A0 - A10) *1  
A0 - A8  
(A0 - A9)*1  
Row Address Buffer  
Col. Address Buffer  
Speed  
-5  
Remark  
tRAC  
50ns  
60ns  
tCAC  
tRC  
tPC  
Data out  
Buffer  
13ns  
90ns  
35ns 5V/3.3V  
Column Decoder  
OE  
-6  
15ns 110ns 40ns 5V/3.3V  
Note) *1 : 2K Refresh  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  
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与KM48V2100CT-L5相关器件

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KM48V2104AJ-7 SAMSUNG

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 		EDO DRAM, 2MX8, 70ns, CMOS, PDSO28, 0.400 INCH, PLASTIC, SOJ-28
KM48V2104ALLTR-6 SAMSUNG

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 		EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.400 INCH, PLASTIC, REVERSE, TSOP2-28
KM48V2104ALT-6 SAMSUNG

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 		EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.400 INCH, PLASTIC, TSOP2-28
KM48V2104ATR-8 SAMSUNG

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 		EDO DRAM, 2MX8, 80ns, CMOS, PDSO28, 0.400 INCH, PLASTIC, REVERSE, TSOP2-28
KM48V2104BK-L6 SAMSUNG

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 		EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
KM48V2104BS-6 SAMSUNG

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 		EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, TSOP2-28
KM48V2104BS-8 SAMSUNG

获取价格

 		EDO DRAM, 2MX8, 80ns, CMOS, PDSO28, 0.300 INCH, TSOP2-28
KM48V2104CK-6 SAMSUNG

获取价格

 		EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28
KM48V2104CS-5 SAMSUNG

获取价格

 		EDO DRAM, 2MX8, 50ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, TSOP2-28
KM48V2104CS-6 SAMSUNG

获取价格

 		EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, TSOP2-28

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