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KM41V4000D PDF预览

KM41V4000D

更新时间: 2024-09-16 22:10:35
品牌 Logo 应用领域
三星 - SAMSUNG /
页数 文件大小 规格书
20页 342K
描述
4M x 1Bit CMOS Dynamic RAM with Fast Page Mode

KM41V4000D 数据手册

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KM41C4000D, KM41V4000D  
CMOS DRAM  
4M x 1Bit CMOS Dynamic RAM with Fast Page Mode  
DESCRIPTION  
This is a family of 4,194,304 x 1bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells  
within the same row. Power supply voltage (+5V or +3.3V), access time (-5, -6 or -7), power consumption(Normal or Low power), and  
package type (SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and  
Hidden refresh capabilities. Furthermore, self-refresh operation is available in Low power version.  
This 4Mx1 Fast Page Mode DRAM family is fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power  
consumption and high reliability. It may be used as main memory for main frames and mini computers, personal computer and high per-  
formance microprocessor systems.  
• Fast Page Mode operation  
FEATURES  
• CAS-before-RAS refresh capability  
• Part Identification  
• RAS-only and Hidden refresh capability  
• Self-refresh capability (3.3V, L-ver only)  
• Fast parallel test mode capability  
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs  
• Common I/O using early write  
- KM41C4000D/D-L(5V, 1K Ref.)  
- KM41V4000D/D-L(3.3V, 1K Ref.)  
ActivePowerDissipation  
• JEDEC Standard pinout  
Unit : mW  
5V  
• Available in 26(20)-pin SOJ 300mil and TSOP(II)  
300mil packages  
Speed  
-5  
3.3V  
-
470  
• +5V±10% power supply(5V product)  
• +3.3V±0.3V power supply(3.3V product)  
-6  
220  
200  
415  
-7  
360  
FUNCTIONAL BLOCK DIAGRAM  
Refresh Cycles  
RAS  
CAS  
W
Vcc  
Vss  
Control  
Clocks  
Part  
NO.  
Refresh  
cycle  
Refresh Period  
VBB Generator  
Normal  
L-ver  
KM41C4000D  
KM41V4000D  
1K  
16ms  
128ms  
Row Decoder  
Refresh Timer  
Refresh Control  
Data in  
Buffer  
D
Memory Array  
4,194,304 x1  
Cells  
Refresh Counter  
Row Address Buffer  
Col. Address Buffer  
Performance Range  
Speed  
-5  
Remark  
tRAC  
tCAC  
tRC  
tPC  
50ns 15ns 90ns 35ns 5V only  
60ns 15ns 110ns 40ns 5V/3.3V  
70ns 20ns 130ns 45ns 5V/3.3V  
Data out  
Buffer  
A0~A9  
Q
Column Decoder  
-6  
-7  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  

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