Datasheet > K4S561632D-TC/L75

K4S561632D-TC/L75

更新时间： 2022-01-15 08:17:08

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器
页数	文件大小	规格书
11页	63K
描述
256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL

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K4S561632D

CMOS SDRAM

DC CHARACTERISTICS

(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)

Version

Parameter

Symbol

Test Condition

Unit Note

-60

-7C

-75

-1H -1L

Burst length = 1

tRC ³ tRC(min)

IO = 0 mA

Operating current

(One bank active)

ICC1

150 110

100

100 100

ICC2P

CKE £ VIL(max), tCC = 10ns

Precharge standby cur-

rent in power-down mode

ICC2PS

CKE & CLK £ VIL(max), tCC = ¥

CKE ³ VIH(min), CS ³ VIH(min), tCC = 10ns

ICC2N

Precharge standby cur-

rent in non power-down

mode

Input signals are changed one time during 20ns

CKE ³ VIH(min), CLK £ VIL(max), tCC = ¥

Input signals are stable

ICC2NS

ICC3P

CKE £ VIL(max), tCC = 10ns

Active standby current in

power-down mode

ICC3PS

CKE & CLK £ VIL(max), tCC = ¥

CKE ³ VIH(min), CS ³ VIH(min), tCC = 10ns

Input signals are changed one time during 20ns

ICC3N

Active standby current in

non power-down mode

(One bank active)

CKE ³ VIH(min), CLK £ VIL(max), tCC = ¥

Input signals are stable

ICC3NS

IO = 0 mA

Operating current

(Burst mode)

Page burst

ICC4

180 140

220 220

140

130 130

190 190

4banks Activated.

tCCD = 2CLKs

Refresh current

ICC5

ICC6

tRC ³ tRC(min)

200

Self refresh current

CKE £ 0.2V

1.5

Notes :

1. Measured with outputs open.

2. Refresh period is 64ms.

3. K4S561632D-TC**

4. K4S561632D-TL**

5. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ).

Rev. 0.1 Aug. 2002

1...3 4 567 8 9...11

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与K4S561632D-TC/L75相关器件

型号	品牌	获取价格	描述	数据表
K4S561632D-TC/L7C	SAMSUNG	获取价格	256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL
K4S561632D-TC1L	SAMSUNG	获取价格	Synchronous DRAM, 16MX16, 6ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54
K4S561632D-TC60	SAMSUNG	获取价格	Synchronous DRAM, 16MX16, 5ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54
K4S561632D-TC75	SAMSUNG	获取价格	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54
K4S561632D-TC75000	SAMSUNG	获取价格	256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL
K4S561632D-TC75T	SAMSUNG	获取价格	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54
K4S561632D-TL75	SAMSUNG	获取价格	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54
K4S561632D-TL7C	SAMSUNG	获取价格	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54
K4S561632E	SAMSUNG	获取价格	256Mb E-die SDRAM Specification
K4S561632E-NC60	SAMSUNG	获取价格	Synchronous DRAM, 16MX16, 5ns, CMOS, PDSO54