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K3N4V1000E-GC12 PDF预览

K3N4V1000E-GC12

更新时间: 2024-11-18 20:40:55
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM光电二极管内存集成电路
页数 文件大小 规格书
3页 31K
描述
MASK ROM, 512KX16, 120ns, CMOS, PDSO44, 0.600 INCH, SOP-44

K3N4V1000E-GC12 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, TSOP44,.46,32
针数:44Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92最长访问时间:120 ns
备用内存宽度:8JESD-30 代码:R-PDSO-G44
JESD-609代码:e0长度:28.5 mm
内存密度:8388608 bit内存集成电路类型:MASK ROM
内存宽度:16功能数量:1
端子数量:44字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX16封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:TSOP44,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:3.1 mm最大待机电流:0.00003 A
子类别:MASK ROMs最大压摆率:0.03 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:12.6 mm
Base Number Matches:1

K3N4V1000E-GC12 数据手册

 浏览型号K3N4V1000E-GC12的Datasheet PDF文件第2页浏览型号K3N4V1000E-GC12的Datasheet PDF文件第3页 
K3N4V(U)1000E-D(G)C  
CMOS MASK ROM  
8M-Bit (1Mx8/ 512Kx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
· Switchable organization  
The K3N4V(U)1000E-D(G)C is a fully static mask programma-  
ble ROM fabricated using silicon gate CMOS process technol-  
ogy, and is organized either as 1,048,576 x 8(byte mode) or as  
1,048,576 x 8(byte mode)  
524,288 x 16(word mode)  
· Fast access time  
524,288  
x
16(word mode) depending on BHE voltage  
3.3V Operation : 100ns(Max.)@CL=50pF,  
120ns(Max.)@CL=100pF  
3.0V Operation : 120ns(Max.)@CL=100pF  
· Supply voltage : single +3.0V/single +3.3V  
· Current consumption  
level.(See mode selection table)  
This device operates with 3.0V or 3.3V power supply, and all  
inputs and outputs are TTL compatible.  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
Operating : 30mA(Max.)  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
Standby : 30mA(Max.)  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
The K3N4V(U)1000E-DC is packaged in a 42-DIP and the  
K3N4V(U)1000E-GC in a 44-SOP.  
· Package  
-. K3N4V(U)1000E-DC : 42-DIP-600  
-. K3N4V(U)1000E-GC : 44-SOP-600  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATION  
A18  
X
MEMORY CELL  
MATRIX  
A18  
A17  
A7  
1
2
42  
N.C  
N.C  
1
2
3
4
44 N.C  
N.C  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
41 A8  
40 A9  
39 A10  
38 A11  
A18  
43  
42 A8  
A9  
(524,288x16/  
1,048,576x8)  
3
A17  
A7  
DECODER  
4
A6  
A5  
41  
40 A10  
A11  
5
A6  
A5  
A4  
A3  
A2  
5
6
7
8
6
A4  
A3  
37  
36  
A12  
A13  
39  
7
38 A12  
37 A13  
Y
SENSE AMP.  
8
A2  
A1  
35 A14  
BUFFERS  
AND  
9
34  
A15  
A14  
A15  
9
36  
35  
DATA OUT  
BUFFERS  
10  
11  
12  
13  
14  
15  
16  
A0  
33 A16  
32 BHE  
31 VSS  
30  
A1 10  
A0  
A0  
DECODER  
CE  
VSS  
OE  
Q0  
34 A16  
11  
CE 12  
DIP  
SOP  
33 BHE  
A-1  
Q15/A-1 VSS  
VSS  
13  
32  
29 Q7  
.
.
.
OE 14  
Q15/A-1  
31  
30  
Q8  
28  
Q14  
Q0  
Q7  
15  
Q1  
27 Q6  
CE  
Q8 16  
29 Q14  
28 Q6  
27 Q13  
Q9 17  
26  
25  
24  
Q13  
Q5  
Q0/Q8  
Q7/Q15  
Q1  
17  
CONTROL  
LOGIC  
18  
Q2  
OE  
Q9  
18  
19  
20  
21  
Q10  
Q3  
Q12  
Q5  
Q2 19  
26  
25 Q12  
Q4  
BHE  
23 Q4  
22  
Q10 20  
Q11  
VCC  
Q3  
21  
22  
24  
23 VCC  
Q11  
Pin Name  
A0 - A18  
Pin Function  
Address Inputs  
K3N4V(U)1000E-DC  
Q0 - Q14  
Q15 /A-1  
Data Outputs  
K3N4V(U)1000E-GC  
Output 15(Word mode)/  
LSB Address(Byte mode)  
BHE  
CE  
Word/Byte selection  
Chip Enable  
Output Enable  
Power  
OE  
VCC  
VSS  
N.C  
Ground  
No Connection  

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