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IS64WV6416BLL-15BA3 PDF预览

IS64WV6416BLL-15BA3

更新时间: 2024-11-27 03:02:35
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
16页 101K
描述
64K x 16 HIGH-SPEED CMOS STATIC RAM

IS64WV6416BLL-15BA3 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:TFBGA, BGA48,6X8,30针数:48
Reach Compliance Code:compliantECCN代码:3A991.B.2.B
HTS代码:8542.32.00.41风险等级:8.62
最长访问时间:15 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B48JESD-609代码:e0
长度:8 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:48字数:65536 words
字数代码:64000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-40 °C
组织:64KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.7/3.3 V
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.2 mm最大待机电流:0.075 A
最小待机电流:1.8 V子类别:SRAMs
最大压摆率:0.05 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6 mm

IS64WV6416BLL-15BA3 数据手册

 浏览型号IS64WV6416BLL-15BA3的Datasheet PDF文件第2页浏览型号IS64WV6416BLL-15BA3的Datasheet PDF文件第3页浏览型号IS64WV6416BLL-15BA3的Datasheet PDF文件第4页浏览型号IS64WV6416BLL-15BA3的Datasheet PDF文件第5页浏览型号IS64WV6416BLL-15BA3的Datasheet PDF文件第6页浏览型号IS64WV6416BLL-15BA3的Datasheet PDF文件第7页 
®
IS64WV6416BLL  
IS61WV6416BLL  
ISSI  
64K x 16 HIGH-SPEED CMOS STATIC RAM  
NOVEMBER 2005  
FEATURES  
DESCRIPTION  
TheISSIIS61/64WV6416BLLisahigh-speed,1,048,576-  
bit static RAM organized as 65,536 words by 16 bits. It is  
fabricated using ISSI's high-performance CMOS  
technology.Thishighlyreliableprocesscoupledwithinno-  
vative circuit design techniques, yields access times as  
fast as 12ns (3.3V + 10%) and 15ns (2.5V-3.6V) with low  
powerconsumption.  
• High-speed access time:  
12 ns: 3.3V + 10%  
15 ns: 2.5V-3.6V  
• CMOS low power operation:  
50 mW (typical) operating  
25 µW (typical) standby  
• TTL compatible interface levels  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
• Fully static operation: no clock or refresh  
required  
• Three state outputs  
EasymemoryexpansionisprovidedbyusingChipEnable  
and Output Enable inputs, CE and OE. The active LOW  
Write Enable (WE) controls both writing and reading of the  
memory. A data byte allows Upper Byte (UB) and Lower  
Byte (LB) access.  
• Data control for upper and lower bytes  
• Automotive Temperature Available  
• Lead-free available  
The IS61/64WV6416BLL is packaged in the JEDEC stan-  
dard 44-pin TSOP-II, and 48-pin mini BGA (6mm x 8mm).  
FUNCTIONAL BLOCK DIAGRAM  
64K x 16  
MEMORY ARRAY  
A0-A15  
DECODER  
V
DD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. B  
1
11/08/05  

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