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IS64WV6416EEBLL-8BLA1 PDF预览

IS64WV6416EEBLL-8BLA1

更新时间： 2024-11-27 18:15:35
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
15页 1230K
描述
Standard SRAM, 64KX16, 8ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, TFBGA-48

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IS64WV6416EEBLL-8BLA1 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：TFBGA, BGA48,6X8,30Reach Compliance Code：compliant
风险等级：5.75最长访问时间：8 ns
I/O 类型：COMMONJESD-30 代码：R-PBGA-B48
长度：8 mm内存密度：1048576 bit
内存集成电路类型：STANDARD SRAM内存宽度：16
功能数量：1端子数量：48
字数：65536 words字数代码：64000
工作模式：ASYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：64KX16
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：TFBGA封装等效代码：BGA48,6X8,30
封装形状：RECTANGULAR封装形式：GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行：PARALLEL电源：2.5/3.3 V
认证状态：Not Qualified筛选级别：AEC-Q100
座面最大高度：1.2 mm最大待机电流：0.01 A
最小待机电流：2 V子类别：SRAMs
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.4 V
标称供电电压 (Vsup)：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：BALL端子节距：0.75 mm
端子位置：BOTTOM宽度：6 mm
Base Number Matches：1

IS64WV6416EEBLL-8BLA1 数据手册

 浏览型号IS64WV6416EEBLL-8BLA1的Datasheet PDF文件第2页浏览型号IS64WV6416EEBLL-8BLA1的Datasheet PDF文件第3页浏览型号IS64WV6416EEBLL-8BLA1的Datasheet PDF文件第4页浏览型号IS64WV6416EEBLL-8BLA1的Datasheet PDF文件第5页浏览型号IS64WV6416EEBLL-8BLA1的Datasheet PDF文件第6页浏览型号IS64WV6416EEBLL-8BLA1的Datasheet PDF文件第7页 
IS61WV6416EEBLL  
IS64WV6416EEBLL  
64K x 16 HIGH SPEED ASYNCHRONOUS  
CMOS STATIC RAM WITH ECC  
FEBRUARY 2014  
DESCRIPTION  
FEATURES  
Theꢀ ISSIꢀ IS61/64WV6416EEBLLꢀ isꢀ aꢀ ꢀ high-speed,ꢀ  
1,048,576-bitꢀstaticꢀRAMsꢀorganizedꢀasꢀ65,536ꢀwordsꢀbyꢀ16ꢀ  
bits. It is fabricated using ISSI's high-performance CMOS  
technology.ꢀThisꢀhighlyꢀreliableꢀprocessꢀcoupledꢀwithꢀin-  
novativecircuitdesigntechniques,yieldshigh-performance  
and low power consumption devices.  
•ꢀ High-speedꢀaccessꢀtime:ꢀ8,ꢀ10ꢀns  
•ꢀ LowꢀActiveꢀPower:ꢀ85ꢀmWꢀ(typical)  
•ꢀ LowꢀStandbyꢀPower:ꢀ7ꢀmWꢀ(typical)  
CMOS standby  
•ꢀ Singleꢀpowerꢀsupply  
•ꢀ Fullyꢀstaticꢀoperation:ꢀnoꢀclockꢀorꢀrefreshꢀ  
WhenꢀCEꢀisꢀHIGHꢀ(deselected),ꢀtheꢀdeviceꢀassumesꢀaꢀ  
standby mode at which the power dissipation can be re-  
duced down with CMOS input levels.  
required  
•ꢀ Threeꢀstateꢀoutputs  
•ꢀ Dataꢀcontrolꢀforꢀupperꢀandꢀlowerꢀbytes  
•ꢀ IndustrialꢀandꢀAutomotiveꢀtemperatureꢀsupport  
•ꢀ Lead-freeꢀavailable  
EasyꢀmemoryꢀexpansionꢀisꢀprovidedꢀbyꢀusingꢀChipꢀEnableꢀ  
andꢀOutputꢀEnableꢀinputs,ꢀCE and OE.ꢀTheꢀactiveꢀLOWꢀ  
WriteꢀEnableꢀ(WE) controls both writing and reading of the  
memory.ꢀꢀAꢀdataꢀbyteꢀallowsꢀUpperꢀByteꢀ(UB)ꢀandꢀLowerꢀ  
Byteꢀ(LB) access.  
•ꢀ ErrorꢀDetectionꢀandꢀErrorꢀCorrection  
TheꢀIS61/64WV6416EEBLLꢀisꢀꢀpackagedꢀinꢀtheꢀJEDECꢀ  
standardꢀ44-pinꢀTSOP-II,ꢀ48-pinꢀMiniꢀBGAꢀ(6mmꢀxꢀ8mm),ꢀ  
andꢀ44-pinꢀSOJ.  
FUNCTIONAL BLOCK DIAGRAM  
Memory  
Lower IO  
Array-  
Memory  
Upper IO  
Array-  
A0-A15  
ECC  
Array-  
64K  
ECC  
Array-  
64K  
Decoder  
x4  
x4  
64Kx8  
64Kx8  
8
4
8
4
8
8
8
8
12  
12  
IO0-7  
ECC  
ECC  
I/O Data  
Circuit  
Column I/O  
IO8-15  
/CE  
/OE  
/WE  
/UB  
/LB  
Control  
Circuit  
Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-  
est version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-  
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications  
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. A1  
02/14/2014  
1234567...15

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