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IS61LV6416-10KI PDF预览

IS61LV6416-10KI

更新时间: 2024-01-25 19:40:26
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
16页 146K
描述
64K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY

IS61LV6416-10KI 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:SOJ
包装说明:0.400 INCH, PLASTIC, MS-027, SOJ-44针数:44
Reach Compliance Code:compliantECCN代码:3A991.B.2.B
HTS代码:8542.32.00.41风险等级:5.82
Is Samacsys:N最长访问时间:10 ns
其他特性:LOW POWER STANDBY MODEI/O 类型:COMMON
JESD-30 代码:R-PDSO-J44JESD-609代码:e0
长度:28.575 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:44字数:65536 words
字数代码:64000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:64KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装等效代码:SOJ44,.44封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:3.75 mm
最大待机电流:0.01 A最小待机电流:3.14 V
子类别:SRAMs最大压摆率:0.13 mA
最大供电电压 (Vsup):3.63 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10.16 mm
Base Number Matches:1

IS61LV6416-10KI 数据手册

 浏览型号IS61LV6416-10KI的Datasheet PDF文件第2页浏览型号IS61LV6416-10KI的Datasheet PDF文件第3页浏览型号IS61LV6416-10KI的Datasheet PDF文件第4页浏览型号IS61LV6416-10KI的Datasheet PDF文件第5页浏览型号IS61LV6416-10KI的Datasheet PDF文件第6页浏览型号IS61LV6416-10KI的Datasheet PDF文件第7页 
®
IS61LV6416  
IS61LV6416L  
ISSI  
64K x 16 HIGH-SPEED CMOS STATIC RAM  
WITH 3.3V SUPPLY  
NOVEMBER2005  
FEATURES  
DESCRIPTION  
The ISSI IS61LV6416/IS61LV6416L is a high-speed,  
1,048,576-bitstaticRAMorganizedas65,536wordsby16  
bits. It is fabricated using ISSI's high-performance CMOS  
technology. This highly reliable process coupled with  
innovative circuit design techniques, yields access times  
as fast as 8 ns with low power consumption.  
• High-speed access time: 8, 10, 12 ns  
• CMOS low power operation  
— 61LV6416:  
75 mW (typical) operating current  
0.5 mW (typical) standby current  
— 61LV6416L:  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
65 mW (typical) operating current  
50 µW (typical) standby current  
• TTL compatible interface levels  
• Single 3.3V power supply  
Easy memory expansion is provided by using Chip  
Enable and Output Enable inputs, CE and OE. The active  
LOW Write Enable (WE) controls both writing and reading  
of the memory. A data byte allows Upper Byte (UB) and  
Lower Byte (LB) access.  
• Fully static operation: no clock or refresh  
required  
• Three state outputs  
TheIS61LV6416/IS61LV6416LispackagedintheJEDEC  
standard 44-pin 400-mil SOJ, 44-pin TSOP-II, and 48-pin  
mini BGA (6mm x 8mm).  
• Data control for upper and lower bytes  
• Industrial temperature available  
• Lead-free available  
FUNCTIONAL BLOCK DIAGRAM  
64K x 16  
MEMORY ARRAY  
A0-A15  
DECODER  
VDD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc.  
1
Rev. I  
11/22/05  

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